Tim Northover fe880a8801 GlobalISel: mark simple ops legal even on types < 32-bit. ...

The 32-bit variants of these operations don't depend on the bits not being
operated on, so they also naturally model operations narrower than the actual
register width.

llvm-svn: 279760

2016-08-25 17:37:39 +00:00

..

AArch64

GlobalISel: mark simple ops legal even on types < 32-bit.

2016-08-25 17:37:39 +00:00

AMDGPU

AMDGCN/SI: Implement readlane/readfirstlane intrinsics

2016-08-24 20:35:23 +00:00

ARM

MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it

2016-08-25 01:27:13 +00:00

BPF

[BPF] Remove exit-on-error from tests (PR27768, PR27769)

2016-05-30 08:28:34 +00:00

Generic

CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses

2016-08-24 01:52:46 +00:00

Hexagon

[Hexagon] vector store print tracing.

2016-08-25 13:35:48 +00:00

Inputs

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

Lanai

Add a REQUIRES: assert on a Lanai test that uses a -debug-only flag

2016-07-29 19:35:22 +00:00

Mips

[mips] Preparatory work for a generic scheduler

2016-08-24 13:00:47 +00:00

MIR

MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it

2016-08-25 01:27:13 +00:00

MSP430

Revert r279242 - it's failing the tests

2016-08-19 14:18:34 +00:00

NVPTX

[NVPTX] Switch nvptx-use-infer-addrspace to true.

2016-08-19 20:46:45 +00:00

PowerPC

MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it

2016-08-25 01:27:13 +00:00

SPARC

Revert "[Sparc] Leon errata fix passes."

2016-08-12 14:48:09 +00:00

SystemZ

[SystemZ] Use valid base/index regs for inline asm

2016-08-18 21:44:15 +00:00

Thumb

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

Thumb2

CodeGen: If Convert blocks that would form a diamond when tail-merged.

2016-08-24 21:34:27 +00:00

WebAssembly

[WebAssembly] Disable the store-results optimization.

2016-08-18 17:51:27 +00:00

WinEH

Revert EH-specific checks in BranchFolding that were causing blow ups in compile time.

2016-07-27 17:55:33 +00:00

X86

[X86] 512-bit VPAVG requires AVX512BW

2016-08-25 17:17:46 +00:00

XCore

IR: Introduce Module::global_objects().

2016-06-22 20:29:42 +00:00