Matt Arsenault 3af85fa8f0 GlobalISel: Handle more cases in lowerUnmergeValues ...

Handle scalar sources, as well as vectors.

2020-05-09 19:33:32 -04:00

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AArch64

GlobalISel: Combine G_UNMERGE_VALUES with G_TRUNC

2020-05-09 16:14:32 -04:00

AMDGPU

GlobalISel: Handle more cases in lowerUnmergeValues

2020-05-09 19:33:32 -04:00

ARC

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ARM

Correctly modify the CFG in IfConverter, and then remove the

2020-05-07 18:17:07 -04:00

AVR

[AVR] Do not place functions in .progmem.data

2020-04-20 13:56:38 +02:00

BPF

BPF: fix a CORE optimization bug

2020-04-20 19:54:51 -07:00

Generic

[MachineDebugify] Insert synthetic DBG_VALUE instructions

2020-04-22 17:03:39 -07:00

Hexagon

[ModuloSchedule] Fix epilogue peeling with illegal phi.

2020-05-07 10:04:05 -07:00

Inputs

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Lanai

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Mips

[SelectionDAGBuilder] Stop setting alignment to one for hidden sret values

2020-05-04 14:44:39 +01:00

MIR

[AMDGPU] Avoid hard-coded line numbers in error message checks

2020-04-23 21:06:09 +01:00

MSP430

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NVPTX

[llvm] Fix missing FileCheck directive colons

2020-04-06 09:59:08 -06:00

PowerPC

[Target][XCOFF] Correctly halt when mixing AIX or XCOFF with ppc64le

2020-05-08 16:51:34 -04:00

RISCV

[RISCV][NFC] Add more constant materialization tests

2020-05-06 16:06:16 +01:00

SPARC

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SystemZ

[SystemZ] Fix/optimize vec_load_len and related intrinsics

2020-05-06 21:15:58 +02:00

Thumb

[ARM] Don't shrink STM if it would cause an unknown base register store

2020-04-22 14:50:42 +01:00

Thumb2

[ARM] Convert VDUPLANE to VDUP under MVE

2020-05-09 18:58:13 +01:00

VE

[VE] Update branch instructions

2020-04-28 09:41:01 +02:00

WebAssembly

[WebAssembly] Disallow 'shared-mem' rather than 'atomics'

2020-05-08 13:52:39 -07:00

WinCFGuard

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WinEH

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X86

[X86] isVectorShiftByScalarCheap - don't limit fast XOP vector shifts to 128-bit vectors

2020-05-09 22:24:08 +01:00

XCore

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