Matt Arsenault 2b4ac66297

AMDGPU: Cleanup and modernize limit-coalesce.mir test (#166465)

2025-11-04 23:57:39 +00:00

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AArch64

[AArch64] Copy implicit def operands when creating LDP. (#164253)

2025-11-04 21:55:57 +00:00

AMDGPU

AMDGPU: Cleanup and modernize limit-coalesce.mir test (#166465)

2025-11-04 23:57:39 +00:00

ARC

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ARM

ARM: Add watchos run line to llvm.sincos test (#166271)

2025-11-03 18:20:24 -08:00

AVR

[AVR] Fix occasional corruption in stack passed params

2025-10-24 08:45:10 +08:00

BPF

[BPF] Avoid relocation for jumptable entries (#166301)

2025-11-04 11:32:12 -08:00

CSKY

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DirectX

[HLSL] Implement the f16tof32() intrinsic (#165860)

2025-11-04 17:04:39 +00:00

Generic

[CodeGen] Add skipFunction() check to MachineFunctionSplitter (#166260)

2025-11-04 11:01:50 -08:00

Hexagon

[SimplifyCFG] Eliminate dead edges of switches according to the domain of conditions (#165748)

2025-11-04 20:55:33 +08:00

Inputs

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Lanai

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LoongArch

[LoongArch] Make fminnum/fmaxnum legal for lsx/lasx (#162768)

2025-11-03 10:14:33 +08:00

M68k

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Mips

[GlobalISel] Combine away G_UNMERGE(G_IMPLICITDEF). (#119183)

2025-10-28 09:57:31 +00:00

MIR

[GlobalISel] Make scalar G_SHUFFLE_VECTOR illegal. (#140508)

2025-10-24 08:21:35 +01:00

MIR2Vec

[X86] Remove AMX-TRANSPOSE (#165556)

2025-10-31 12:50:21 +01:00

MLRegAlloc

[MLGO] Update MLRegAlloc Test

2025-10-31 20:39:12 +00:00

MSP430

MSP430: Remove more default compiler-rt calls (#164752)

2025-10-23 15:23:02 +09:00

NVPTX

Added Conditions of SM90 and ISA7.8 for Using cvt.ftz.f32.bf16 Instruction (#165774)

2025-11-04 14:02:49 -05:00

PowerPC

[PowerPC] Ensure correct codgen for MMA functions for cpu=future (#165791)

2025-11-04 09:29:26 -05:00

RISCV

[IR] Add new function attribute nocreateundeforpoison (#164809)

2025-11-04 12:00:44 +00:00

SPARC

[SPARC] Weaken emitted barriers for atomic ops (#154950)

2025-10-08 10:40:25 +09:00

SPIRV

[HLSL] Implement the f16tof32() intrinsic (#165860)

2025-11-04 17:04:39 +00:00

SystemZ

[SelectionDAG] Use GetPromotedInteger when promoting integer operands of PATCHPOINT/STACKMAP. (#165926)

2025-10-31 22:11:13 +00:00

Thumb

[test][ARM] Remove unsafe-fp-math-uses (NFC) (#164744)

2025-10-23 15:07:46 +08:00

Thumb2

[LSR] Don't count conditional loads/store as enabling pre/post-index (#159573)

2025-10-30 13:53:15 +00:00

VE

[LLVM][CodeGen][SVE] Remove failure cases when widening vector load/store ops. (#160515)

2025-10-02 12:24:23 +01:00

WebAssembly

[WebAssembly] [Codegen] Add pattern for relaxed min max from pmin/pmax-based patterns over v4f32 and v2f64 (#164486)

2025-10-23 01:39:02 -07:00

WinCFGuard

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WinEH

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X86

[X86][NewPM] Port lower-amx-intrinsics to NewPM

2025-11-04 11:27:38 -08:00

XCore

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Xtensa

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