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llvm-project/llvm/test/Transforms/LoopVectorize/AArch64
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Kerry McLaughlin ff64b2933a [LoopVectorize] Check the number of uses of an FAdd before classifying as ordered 
checkOrderedReductions looks for Phi nodes which can be classified as in-order,
meaning they can be vectorised without unsafe math. In order to vectorise the
reduction it should also be classified as in-loop by getReductionOpChain, which
checks that the reduction has two uses.

In this patch, a similar check is added to checkOrderedReductions so that we
now return false if there are more than two uses of the FAdd instruction.
This fixes PR52515.

Reviewed By: fhahn, david-arm

Differential Revision: https://reviews.llvm.org/D114002
2021-11-18 16:41:19 +00:00
..
aarch64-predication.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
aarch64-unroll.ll
…
arbitrary-induction-step.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
arm64-unroll.ll
…
backedge-overflow.ll
…
deterministic-type-shrinkage.ll
…
eliminate-tail-predication.ll
[LV] Add -scalable-vectorization=<option> flag.
2021-05-19 10:40:56 +01:00
extend-vectorization-factor-for-unprofitable-memops.ll
[AArch64] Cost-model i8 vector loads/stores
2021-07-05 11:25:10 +01:00
extractvalue-no-scalarization-required.ll
[LV] Consider ExtractValue as uniform.
2021-08-05 16:20:50 +01:00
first-order-recurrence.ll
[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute
2021-08-17 14:42:47 +01:00
gather-cost.ll
…
induction-trunc.ll
Revert "[IR] IRBuilderBase::CreateAdd(): short-circuit x + 0 --> x"
2021-10-27 22:21:37 +03:00
interleaved_cost.ll
[TTI] BasicTTIImplBase::getInterleavedMemoryOpCost(): fix load discounting
2021-10-22 14:08:58 +03:00
interleaved-store-of-first-order-recurrence.ll
[LV] Add test to store a first-order rec via interleave group.
2021-07-26 15:20:04 +01:00
interleaved-vs-scalar.ll
[AArch64] Cost-model i8 vector loads/stores
2021-07-05 11:25:10 +01:00
intrinsiccost.ll
[CostModel] Update default cost model for sadd/ssub overflow to match TargetLowering
2021-09-30 09:41:14 -07:00
lit.local.cfg
…
loop-vectorization-factors.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
loopvectorize_pr33804_double.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
masked-op-cost.ll
[LV] Build and cost VPlans for scalable VFs.
2021-06-02 14:47:47 +01:00
max-vf-for-interleaved.ll
…
no_vector_instructions.ll
[LoopVectorize] Simplify scalar cost calculation in getInstructionCost
2021-04-28 13:41:07 +01:00
nontemporal-load-store.ll
…
outer_loop_test1_no_explicit_vect_width.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
Oz-and-forced-vectorize.ll
…
pr31900.ll
…
pr33053.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
pr36032.ll
…
pr46950-load-cast-context-crash.ll
…
predication_costs.ll
[LV] Don't assume isScalarAfterVectorization if one of the uses needs widening.
2021-07-26 16:01:55 +01:00
reduction-small-size.ll
…
runtime-check-size-based-threshold.ll
[LV] Add tests where rt checks may make vectorization unprofitable.
2021-09-27 10:32:28 +01:00
scalable-alloca.ll
[LV] Avoid scalable vectorization for loops containing alloca
2021-07-16 11:47:13 +01:00
scalable-call.ll
[LV] Don't let ForceTargetInstructionCost override Invalid cost.
2021-07-26 20:27:49 +01:00
scalable-predicate-instruction.ll
[LoopVectorize] Fix crash for predicated instruction with scalable VF
2021-07-22 12:48:27 +01:00
scalable-reductions.ll
[LV] Prevent vectorization with unsupported element types.
2021-07-06 13:06:21 +01:00
scalable-strict-fadd.ll
[IR] In ConstantFoldShuffleVectorInstruction use zeroinitializer for splats of 0
2021-11-10 09:42:58 +00:00
scalable-vectorization-cost-tuning.ll
[LV] Use VScaleForTuning to fine-tune the cost per lane.
2021-11-08 16:59:46 +00:00
scalable-vectorization.ll
[LV] Use VScaleForTuning to fine-tune the cost per lane.
2021-11-08 16:59:46 +00:00
scalable-vf-hint.ll
[LV] Use VScaleForTuning to fine-tune the cost per lane.
2021-11-08 16:59:46 +00:00
scalarize-store-with-predication.ll
Revert "[IR] IRBuilderBase::CreateAdd(): short-circuit x + 0 --> x"
2021-10-27 22:21:37 +03:00
sdiv-pow2.ll
…
select-costs.ll
…
smallest-and-widest-types.ll
…
strict-fadd-cost.ll
[Analysis][AArch64] Make fixed-width ordered reductions slightly more expensive
2021-08-18 17:01:56 +01:00
strict-fadd-vf1.ll
[NFC] Rename enable-strict-reductions to force-ordered-reductions
2021-08-03 09:33:01 +01:00
strict-fadd.ll
[LoopVectorize] Check the number of uses of an FAdd before classifying as ordered
2021-11-18 16:41:19 +00:00
sve-basic-vec.ll
[IR] In ConstantFoldShuffleVectorInstruction use zeroinitializer for splats of 0
2021-11-10 09:42:58 +00:00
sve-cond-inv-loads.ll
[IR] In ConstantFoldShuffleVectorInstruction use zeroinitializer for splats of 0
2021-11-10 09:42:58 +00:00
sve-epilog-vect.ll
[LoopVectorize] Permit fixed-width epilogue loops for scalable vector bodies
2021-11-08 09:41:13 +00:00
sve-extract-last-veclane.ll
[LV] Add -scalable-vectorization=<option> flag.
2021-05-19 10:40:56 +01:00
sve-gather-scatter.ll
[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute
2021-08-17 14:42:47 +01:00
sve-illegal-type.ll
[AArch64][SVE] Remove i1 type from isElementTypeLegalForScalableVector
2021-11-12 14:24:38 +00:00
sve-inductions-unusual-types.ll
[Analysis] Ensure getTypeLegalizationCost returns a simple VT for TypeScalarizeScalableVector
2021-11-17 13:11:58 +00:00
sve-inductions.ll
[AArch64] NFC: Make some AArch64-SVE LoopVectorize tests generic.
2021-07-26 20:27:48 +01:00
sve-inv-loads.ll
[LV] Add -scalable-vectorization=<option> flag.
2021-05-19 10:40:56 +01:00
sve-inv-store.ll
Revert "[LoopVectorize] Extract the last lane from a uniform store"
2021-11-10 11:21:19 +00:00
sve-large-strides.ll
[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute
2021-08-17 14:42:47 +01:00
sve-masked-loadstore.ll
[LV] Add -scalable-vectorization=<option> flag.
2021-05-19 10:40:56 +01:00
sve-scalable-load-in-loop.ll
[SVE] Remove checks for warnings in scalable-vector tests.
2021-04-07 15:59:32 +01:00
sve-select-cmp.ll
[IR] In ConstantFoldShuffleVectorInstruction use zeroinitializer for splats of 0
2021-11-10 09:42:58 +00:00
sve-strict-fadd-cost.ll
[SVE][Analysis] Tune the cost model according to the tune-cpu attribute
2021-10-21 09:33:50 +01:00
sve-tail-folding.ll
[LV] Disable Scalable VFs when tail folding is enabled b/c of low tripcount.
2021-07-27 11:37:21 +01:00
sve-type-conv.ll
[LV] Add -scalable-vectorization=<option> flag.
2021-05-19 10:40:56 +01:00
sve-vector-reverse-mask4.ll
[InstCombine] Eliminate vector reverse if all inputs/outputs to an instruction are reverses
2021-09-20 18:32:24 -07:00
sve-vector-reverse.ll
[InstCombine] Eliminate vector reverse if all inputs/outputs to an instruction are reverses
2021-09-20 18:32:24 -07:00
sve-widen-extractvalue.ll
[LV] Consider ExtractValue as uniform.
2021-08-05 16:20:50 +01:00
sve-widen-gep.ll
[IR] In ConstantFoldShuffleVectorInstruction use zeroinitializer for splats of 0
2021-11-10 09:42:58 +00:00
sve-widen-phi.ll
[Analysis] Add support for vscale in computeKnownBitsFromOperator
2021-09-20 15:01:59 +01:00
tail-fold-uniform-memops.ll
[NFC][LoopVectorize] Add test for tail-folding loop with conditional uniform load
2021-11-03 09:51:11 +00:00
type-shrinkage-insertelt.ll
…
unsafe-vf-hint-remark.ll
…
veclib-calls-libsystem-darwin.ll
[VecLib] Add support for vector fns from Darwin's libsystem.
2021-05-10 21:19:58 +01:00
vector-reverse-mask4.ll
Revert rG1c9bec727ab5c53fa060560dc8d346a911142170 : [InstCombine] Fold (gep (oneuse(gep Ptr, Idx0)), Idx1) -> (gep Ptr, (add Idx0, Idx1)) (PR51069)
2021-08-23 21:09:26 +01:00
vector-reverse.ll
[SVE] Remove checks for warnings in scalable-vector tests.
2021-04-07 15:59:32 +01:00