77e71c5217
Summary: The AIX assembler .space directive can't take a second non-zero argument to fill with. But LLVM emitFill currently assumes it can. We add a flag to the AsmInfo to check if non-zero fill is supported, and if we can't zerofill non-zero values we just splat the .byte directives. Reviewers: stevewan, sfertile, DiggerLin, jasonliu, Xiangling_L Reviewed By: jasonliu Subscribers: Xiangling_L, wuzish, nemanjai, hiraditya, kbarton, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73554
66 lines
1.9 KiB
C++
66 lines
1.9 KiB
C++
//===-- PPCMCAsmInfo.cpp - PPC asm properties -----------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declarations of the MCAsmInfoDarwin properties.
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//
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//===----------------------------------------------------------------------===//
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#include "PPCMCAsmInfo.h"
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#include "llvm/ADT/Triple.h"
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using namespace llvm;
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void PPCELFMCAsmInfo::anchor() { }
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PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) {
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// FIXME: This is not always needed. For example, it is not needed in the
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// v2 abi.
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NeedsLocalForSize = true;
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if (is64Bit) {
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CodePointerSize = CalleeSaveStackSlotSize = 8;
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}
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IsLittleEndian = T.getArch() == Triple::ppc64le;
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// ".comm align is in bytes but .align is pow-2."
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AlignmentIsInBytes = false;
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CommentString = "#";
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// Uses '.section' before '.bss' directive
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UsesELFSectionDirectiveForBSS = true;
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// Debug Information
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SupportsDebugInformation = true;
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DollarIsPC = true;
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// Set up DWARF directives
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MinInstAlignment = 4;
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// Exceptions handling
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ExceptionsType = ExceptionHandling::DwarfCFI;
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ZeroDirective = "\t.space\t";
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Data64bitsDirective = is64Bit ? "\t.quad\t" : nullptr;
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AssemblerDialect = 1; // New-Style mnemonics.
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LCOMMDirectiveAlignmentType = LCOMM::ByteAlignment;
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UseIntegratedAssembler = true;
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}
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void PPCXCOFFMCAsmInfo::anchor() {}
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PPCXCOFFMCAsmInfo::PPCXCOFFMCAsmInfo(bool Is64Bit, const Triple &T) {
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assert(!IsLittleEndian && "Little-endian XCOFF not supported.");
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CodePointerSize = CalleeSaveStackSlotSize = Is64Bit ? 8 : 4;
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ZeroDirective = "\t.space\t";
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ZeroDirectiveSupportsNonZeroValue = false;
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SymbolsHaveSMC = true;
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}
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