9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
67 lines
3.0 KiB
LLVM
67 lines
3.0 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck --check-prefix=GCN %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck --check-prefix=GCN %s
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declare float @llvm.fabs.f32(float) #0
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declare float @llvm.floor.f32(float) #0
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; GCN-LABEL: {{^}}fract_f32:
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; GCN: v_floor_f32_e32 [[FLR:v[0-9]+]], [[INPUT:v[0-9]+]]
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; GCN: v_sub_f32_e32 [[RESULT:v[0-9]+]], [[INPUT]], [[FLR]]
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; GCN: buffer_store_dword [[RESULT]]
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define amdgpu_kernel void @fract_f32(ptr addrspace(1) %out, ptr addrspace(1) %src) #1 {
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%x = load float, ptr addrspace(1) %src
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%floor.x = call float @llvm.floor.f32(float %x)
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%fract = fsub float %x, %floor.x
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store float %fract, ptr addrspace(1) %out
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ret void
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}
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; GCN-LABEL: {{^}}fract_f32_neg:
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; GCN: v_floor_f32_e64 [[FLR:v[0-9]+]], -[[INPUT:v[0-9]+]]
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; GCN: v_sub_f32_e64 [[RESULT:v[0-9]+]], -[[INPUT]], [[FLR]]
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; GCN: buffer_store_dword [[RESULT]]
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define amdgpu_kernel void @fract_f32_neg(ptr addrspace(1) %out, ptr addrspace(1) %src) #1 {
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%x = load float, ptr addrspace(1) %src
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%x.neg = fsub float -0.0, %x
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%floor.x.neg = call float @llvm.floor.f32(float %x.neg)
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%fract = fsub float %x.neg, %floor.x.neg
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store float %fract, ptr addrspace(1) %out
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ret void
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}
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; GCN-LABEL: {{^}}fract_f32_neg_abs:
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; GCN: v_floor_f32_e64 [[FLR:v[0-9]+]], -|[[INPUT:v[0-9]+]]|
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; GCN: v_sub_f32_e64 [[RESULT:v[0-9]+]], -|[[INPUT]]|, [[FLR]]
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; GCN: buffer_store_dword [[RESULT]]
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define amdgpu_kernel void @fract_f32_neg_abs(ptr addrspace(1) %out, ptr addrspace(1) %src) #1 {
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%x = load float, ptr addrspace(1) %src
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%abs.x = call float @llvm.fabs.f32(float %x)
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%neg.abs.x = fsub float -0.0, %abs.x
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%floor.neg.abs.x = call float @llvm.floor.f32(float %neg.abs.x)
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%fract = fsub float %neg.abs.x, %floor.neg.abs.x
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store float %fract, ptr addrspace(1) %out
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ret void
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}
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; GCN-LABEL: {{^}}multi_use_floor_fract_f32:
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; GCN-DAG: v_floor_f32_e32 [[FLOOR:v[0-9]+]], [[INPUT:v[0-9]+]]
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; GCN-DAG: v_sub_f32_e32 [[FRACT:v[0-9]+]], [[INPUT:v[0-9]+]]
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; GCN: buffer_store_dword [[FLOOR]]
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; GCN: buffer_store_dword [[FRACT]]
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define amdgpu_kernel void @multi_use_floor_fract_f32(ptr addrspace(1) %out, ptr addrspace(1) %src) #1 {
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%x = load float, ptr addrspace(1) %src
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%floor.x = call float @llvm.floor.f32(float %x)
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%fract = fsub float %x, %floor.x
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store volatile float %floor.x, ptr addrspace(1) %out
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store volatile float %fract, ptr addrspace(1) %out
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ret void
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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