9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
17 lines
577 B
LLVM
17 lines
577 B
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=tahiti -mattr=-promote-alloca -verify-machineinstrs < %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s
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; Test that INSERT_SUBREG instructions don't have non-register operands after
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; instruction selection.
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; Make sure this doesn't crash
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; CHECK-LABEL: test:
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define amdgpu_kernel void @test(ptr addrspace(1) %out) {
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entry:
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%tmp0 = alloca [16 x i32], addrspace(5)
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%tmp1 = ptrtoint ptr addrspace(5) %tmp0 to i32
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%tmp2 = sext i32 %tmp1 to i64
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store i64 %tmp2, ptr addrspace(1) %out
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ret void
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}
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