bb3f5e1fed
Following discussions in #110443, and the following earlier discussions in https://lists.llvm.org/pipermail/llvm-dev/2017-October/117907.html, https://reviews.llvm.org/D38482, https://reviews.llvm.org/D38489, this PR attempts to overhaul the `TargetMachine` and `LLVMTargetMachine` interface classes. More specifically: 1. Makes `TargetMachine` the only class implemented under `TargetMachine.h` in the `Target` library. 2. `TargetMachine` contains target-specific interface functions that relate to IR/CodeGen/MC constructs, whereas before (at least on paper) it was supposed to have only IR/MC constructs. Any Target that doesn't want to use the independent code generator simply does not implement them, and returns either `false` or `nullptr`. 3. Renames `LLVMTargetMachine` to `CodeGenCommonTMImpl`. This renaming aims to make the purpose of `LLVMTargetMachine` clearer. Its interface was moved under the CodeGen library, to further emphasis its usage in Targets that use CodeGen directly. 4. Makes `TargetMachine` the only interface used across LLVM and its projects. With these changes, `CodeGenCommonTMImpl` is simply a set of shared function implementations of `TargetMachine`, and CodeGen users don't need to static cast to `LLVMTargetMachine` every time they need a CodeGen-specific feature of the `TargetMachine`. 5. More importantly, does not change any requirements regarding library linking. cc @arsenm @aeubanks
104 lines
2.6 KiB
C++
104 lines
2.6 KiB
C++
//===------------------------------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "GISelMITest.h"
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namespace llvm {
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std::ostream &
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operator<<(std::ostream &OS, const LLT Ty) {
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std::string Repr;
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raw_string_ostream SS{Repr};
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Ty.print(SS);
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OS << Repr;
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return OS;
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}
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std::ostream &
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operator<<(std::ostream &OS, const MachineFunction &MF) {
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std::string Repr;
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raw_string_ostream SS{Repr};
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MF.print(SS);
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OS << Repr;
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return OS;
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}
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}
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std::unique_ptr<TargetMachine> AArch64GISelMITest::createTargetMachine() const {
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Triple TargetTriple("aarch64--");
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std::string Error;
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const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
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if (!T)
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return nullptr;
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TargetOptions Options;
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return std::unique_ptr<TargetMachine>(
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T->createTargetMachine("AArch64", "", "", Options, std::nullopt,
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std::nullopt, CodeGenOptLevel::Aggressive));
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}
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void AArch64GISelMITest::getTargetTestModuleString(SmallString<512> &S,
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StringRef MIRFunc) const {
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(Twine(R"MIR(
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---
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...
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name: func
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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body: |
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bb.1:
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liveins: $x0, $x1, $x2, $x4
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%0(s64) = COPY $x0
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%1(s64) = COPY $x1
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%2(s64) = COPY $x2
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)MIR") +
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Twine(MIRFunc) + Twine("...\n"))
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.toNullTerminatedStringRef(S);
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}
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std::unique_ptr<TargetMachine> AMDGPUGISelMITest::createTargetMachine() const {
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Triple TargetTriple("amdgcn-amd-amdhsa");
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std::string Error;
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const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
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if (!T)
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return nullptr;
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TargetOptions Options;
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return std::unique_ptr<TargetMachine>(T->createTargetMachine(
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"amdgcn-amd-amdhsa", "gfx900", "", Options, std::nullopt, std::nullopt,
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CodeGenOptLevel::Aggressive));
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}
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void AMDGPUGISelMITest::getTargetTestModuleString(
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SmallString<512> &S, StringRef MIRFunc) const {
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(Twine(R"MIR(
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---
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...
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name: func
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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body: |
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bb.1:
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liveins: $vgpr0, $vgpr1, $vgpr2
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%0(s32) = COPY $vgpr0
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%1(s32) = COPY $vgpr1
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%2(s32) = COPY $vgpr2
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)MIR") + Twine(MIRFunc) + Twine("...\n"))
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.toNullTerminatedStringRef(S);
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}
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