fc395884de
The RISC-V psABI [1] defines them similarly to AArch64. [1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#mapping-symbol Reviewed By: yota9, Amir Differential Revision: https://reviews.llvm.org/D153277
28 lines
878 B
ArmAsm
28 lines
878 B
ArmAsm
/// FIXME llvm-mc is used instead of clang because we need a recent change in
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/// the RISC-V MC layer (D153260). Once that one is released, we can switch to
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/// clang. (Note that the pre-merge check buildbots use the system's clang).
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// RUN: llvm-mc -triple riscv64 -mattr=+c -filetype obj -o %t.o %s
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// RUN: ld.lld -o %t %t.o
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// RUN: llvm-bolt --print-cfg --print-only=_start -o %t.bolt %t 2>&1 | FileCheck %s
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// RUN: llvm-objdump -d %t.bolt | FileCheck --check-prefix=CHECK-OBJDUMP %s
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// CHECK-NOT: BOLT-WARNING
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/// Check that .word is not disassembled by BOLT
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// CHECK: 00000000: nop
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// CHECK: 00000002: ret
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/// Check .word is still present in output
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// CHECK-OBJDUMP: <_start>:
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// CHECK-OBJDUMP-NEXT: nop
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// CHECK-OBJDUMP-NEXT: unimp
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// CHECK-OBJDUMP-NEXT: unimp
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// CHECK-OBJDUMP-NEXT: ret
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.text
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.globl _start
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.p2align 1
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_start:
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nop
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.word 0x0
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ret
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