f7a831daa6
Previously we emitted a "does not support scalable vectors" remark for all targets whenever vectorisation is attempted. This pollutes the output for architectures that don't support scalable vectors and is likely confusing to the user. Instead this patch introduces a debug message that reports when scalable vectorisation is allowed by the target and only issues the previous remark when scalable vectorisation is specifically requested, for example: #pragma clang loop vectorize_width(2, scalable) Differential Revision: https://reviews.llvm.org/D108028
34 lines
1.4 KiB
LLVM
34 lines
1.4 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -loop-vectorize -pass-remarks-analysis=loop-vectorize -debug-only=loop-vectorize -S -scalable-vectorization=on < %s 2>&1 | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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; CHECK: LV: User VF=vscale x 4 is ignored because scalable vectors are not available.
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; CHECK: remark: <unknown>:0:0: User-specified vectorization factor vscale x 4 is ignored because the target does not support scalable vectors. The compiler will pick a more suitable value.
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; CHECK: LV: The Widest register safe to use is: 32 bits.
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define void @test1(i32* %a, i32* %b) {
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%arrayidx = getelementptr inbounds i32, i32* %a, i64 %iv
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx2 = getelementptr inbounds i32, i32* %b, i64 %iv
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%1 = load i32, i32* %arrayidx2, align 4
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%add = add nsw i32 %1, %0
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%2 = add nuw nsw i64 %iv, 4
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%arrayidx5 = getelementptr inbounds i32, i32* %a, i64 %2
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store i32 %add, i32* %arrayidx5, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond.not = icmp eq i64 %iv.next, 1024
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br i1 %exitcond.not, label %exit, label %loop, !llvm.loop !0
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exit:
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ret void
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}
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!0 = !{!0, !1, !2}
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!1 = !{!"llvm.loop.vectorize.width", i32 4}
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!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
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