Matt Arsenault 43eeee182a R600/SI: Fix test checking wrong instruction operand. ...

The source and destination happen to be the same register.

llvm-svn: 204271

2014-03-19 22:19:45 +00:00

..

AArch64

Make DAGCombiner work on vector bitshifts with constant splat vectors.

2014-03-17 18:58:01 +00:00

ARM

Remove the linker_private and linker_private_weak linkages.

2014-03-13 23:18:37 +00:00

CPP

Begin adding docs and IR-level support for the inalloca attribute

2013-12-19 02:14:12 +00:00

Generic

CommandLine: Exit successfully for -version and -help

2014-02-28 19:08:01 +00:00

Hexagon

Fix broken CHECK lines

2014-02-16 07:31:05 +00:00

Inputs

Debug Info: update testing cases to specify the debug info version number.

2013-11-22 21:49:45 +00:00

Mips

Add support for scalarizing/splitting vector bswap.

2014-03-18 17:49:12 +00:00

MSP430

Fix known typos

2014-01-24 17:20:08 +00:00

NVPTX

Expose "noduplicate" attribute as a property for intrinsics.

2014-03-18 23:51:07 +00:00

PowerPC

Fix PR19144: Incorrect offset generated for int-to-fp conversion at -O0.

2014-03-18 14:32:50 +00:00

R600

R600/SI: Fix test checking wrong instruction operand.

2014-03-19 22:19:45 +00:00

SPARC

Remove the linker_private and linker_private_weak linkages.

2014-03-13 23:18:37 +00:00

SystemZ

IR: add a second ordering operand to cmpxhg for failure

2014-03-11 10:48:52 +00:00

Thumb

Add triples to try to fix the windows bots.

2014-02-13 16:49:47 +00:00

Thumb2

ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block

2014-02-26 11:27:28 +00:00

X86

X86 memcpy lowering: use "rep movs" even when esi is used as base pointer

2014-03-18 20:04:34 +00:00

XCore

[XCore] Add support for the "m" inline asm constraint.

2014-03-06 16:37:48 +00:00