44deaf7e54
When code relaxation is enabled many RISC-V fixups are not resolved but instead relocations are emitted. This happens even for DWARF debug sections. Therefore, to properly support the parsing of DWARF debug info we need to be able to resolve RISC-V relocations. This patch adds: * Support for RISC-V relocations in RelocationResolver * DWARF support for two relocations per object file offset * DWARF changes to support relocations in more DIE fields The two relocations per offset change is needed because some RISC-V relocations (used for label differences) come in pairs. Relocations can also be emitted for DWARF fields where relocations were not yet evaluated. Adding relocation support for some of these fields is essencial. On the other hand, LLVM currently emits RISC-V relocations for fixups that could be safely evaluated, since they can never be affected by code relaxations. This patch also adds relocation support for the fields affected by those extraneous relocations (the DWARF unit entry Length, and the DWARF debug line entry TotalLength and PrologueLength), for testing purposes. Differential Revision: https://reviews.llvm.org/D62062 Patch by Luís Marques. llvm-svn: 366402
551 lines
14 KiB
C++
551 lines
14 KiB
C++
//===- RelocationResolver.cpp ------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines utilities to resolve relocations in object files.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Object/RelocationResolver.h"
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namespace llvm {
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namespace object {
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static int64_t getELFAddend(RelocationRef R) {
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Expected<int64_t> AddendOrErr = ELFRelocationRef(R).getAddend();
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handleAllErrors(AddendOrErr.takeError(), [](const ErrorInfoBase &EI) {
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report_fatal_error(EI.message());
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});
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return *AddendOrErr;
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}
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static bool supportsX86_64(uint64_t Type) {
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switch (Type) {
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case ELF::R_X86_64_NONE:
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case ELF::R_X86_64_64:
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case ELF::R_X86_64_DTPOFF32:
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case ELF::R_X86_64_DTPOFF64:
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case ELF::R_X86_64_PC32:
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case ELF::R_X86_64_32:
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case ELF::R_X86_64_32S:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveX86_64(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case ELF::R_X86_64_NONE:
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return A;
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case ELF::R_X86_64_64:
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case ELF::R_X86_64_DTPOFF32:
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case ELF::R_X86_64_DTPOFF64:
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return S + getELFAddend(R);
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case ELF::R_X86_64_PC32:
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return S + getELFAddend(R) - R.getOffset();
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case ELF::R_X86_64_32:
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case ELF::R_X86_64_32S:
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return (S + getELFAddend(R)) & 0xFFFFFFFF;
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsAArch64(uint64_t Type) {
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switch (Type) {
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case ELF::R_AARCH64_ABS32:
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case ELF::R_AARCH64_ABS64:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveAArch64(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case ELF::R_AARCH64_ABS32:
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return (S + getELFAddend(R)) & 0xFFFFFFFF;
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case ELF::R_AARCH64_ABS64:
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return S + getELFAddend(R);
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsBPF(uint64_t Type) {
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switch (Type) {
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case ELF::R_BPF_64_32:
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case ELF::R_BPF_64_64:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveBPF(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case ELF::R_BPF_64_32:
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return S & 0xFFFFFFFF;
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case ELF::R_BPF_64_64:
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return S;
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsMips64(uint64_t Type) {
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switch (Type) {
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case ELF::R_MIPS_32:
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case ELF::R_MIPS_64:
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case ELF::R_MIPS_TLS_DTPREL64:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveMips64(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case ELF::R_MIPS_32:
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return (S + getELFAddend(R)) & 0xFFFFFFFF;
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case ELF::R_MIPS_64:
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return S + getELFAddend(R);
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case ELF::R_MIPS_TLS_DTPREL64:
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return S + getELFAddend(R) - 0x8000;
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsPPC64(uint64_t Type) {
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switch (Type) {
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case ELF::R_PPC64_ADDR32:
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case ELF::R_PPC64_ADDR64:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolvePPC64(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case ELF::R_PPC64_ADDR32:
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return (S + getELFAddend(R)) & 0xFFFFFFFF;
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case ELF::R_PPC64_ADDR64:
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return S + getELFAddend(R);
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsSystemZ(uint64_t Type) {
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switch (Type) {
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case ELF::R_390_32:
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case ELF::R_390_64:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveSystemZ(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case ELF::R_390_32:
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return (S + getELFAddend(R)) & 0xFFFFFFFF;
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case ELF::R_390_64:
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return S + getELFAddend(R);
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsSparc64(uint64_t Type) {
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switch (Type) {
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case ELF::R_SPARC_32:
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case ELF::R_SPARC_64:
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case ELF::R_SPARC_UA32:
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case ELF::R_SPARC_UA64:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveSparc64(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case ELF::R_SPARC_32:
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case ELF::R_SPARC_64:
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case ELF::R_SPARC_UA32:
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case ELF::R_SPARC_UA64:
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return S + getELFAddend(R);
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsAmdgpu(uint64_t Type) {
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switch (Type) {
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case ELF::R_AMDGPU_ABS32:
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case ELF::R_AMDGPU_ABS64:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveAmdgpu(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case ELF::R_AMDGPU_ABS32:
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case ELF::R_AMDGPU_ABS64:
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return S + getELFAddend(R);
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsX86(uint64_t Type) {
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switch (Type) {
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case ELF::R_386_NONE:
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case ELF::R_386_32:
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case ELF::R_386_PC32:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveX86(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case ELF::R_386_NONE:
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return A;
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case ELF::R_386_32:
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return S + A;
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case ELF::R_386_PC32:
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return S - R.getOffset() + A;
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsPPC32(uint64_t Type) {
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return Type == ELF::R_PPC_ADDR32;
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}
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static uint64_t resolvePPC32(RelocationRef R, uint64_t S, uint64_t A) {
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if (R.getType() == ELF::R_PPC_ADDR32)
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return (S + getELFAddend(R)) & 0xFFFFFFFF;
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llvm_unreachable("Invalid relocation type");
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}
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static bool supportsARM(uint64_t Type) {
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return Type == ELF::R_ARM_ABS32;
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}
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static uint64_t resolveARM(RelocationRef R, uint64_t S, uint64_t A) {
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if (R.getType() == ELF::R_ARM_ABS32)
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return (S + A) & 0xFFFFFFFF;
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llvm_unreachable("Invalid relocation type");
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}
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static bool supportsAVR(uint64_t Type) {
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switch (Type) {
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case ELF::R_AVR_16:
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case ELF::R_AVR_32:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveAVR(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case ELF::R_AVR_16:
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return (S + getELFAddend(R)) & 0xFFFF;
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case ELF::R_AVR_32:
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return (S + getELFAddend(R)) & 0xFFFFFFFF;
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsLanai(uint64_t Type) {
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return Type == ELF::R_LANAI_32;
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}
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static uint64_t resolveLanai(RelocationRef R, uint64_t S, uint64_t A) {
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if (R.getType() == ELF::R_LANAI_32)
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return (S + getELFAddend(R)) & 0xFFFFFFFF;
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llvm_unreachable("Invalid relocation type");
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}
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static bool supportsMips32(uint64_t Type) {
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switch (Type) {
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case ELF::R_MIPS_32:
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case ELF::R_MIPS_TLS_DTPREL32:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveMips32(RelocationRef R, uint64_t S, uint64_t A) {
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// FIXME: Take in account implicit addends to get correct results.
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uint32_t Rel = R.getType();
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if (Rel == ELF::R_MIPS_32)
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return (S + A) & 0xFFFFFFFF;
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if (Rel == ELF::R_MIPS_TLS_DTPREL32)
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return (S + A) & 0xFFFFFFFF;
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llvm_unreachable("Invalid relocation type");
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}
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static bool supportsSparc32(uint64_t Type) {
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switch (Type) {
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case ELF::R_SPARC_32:
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case ELF::R_SPARC_UA32:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveSparc32(RelocationRef R, uint64_t S, uint64_t A) {
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uint32_t Rel = R.getType();
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if (Rel == ELF::R_SPARC_32 || Rel == ELF::R_SPARC_UA32)
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return S + getELFAddend(R);
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return A;
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}
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static bool supportsHexagon(uint64_t Type) {
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return Type == ELF::R_HEX_32;
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}
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static uint64_t resolveHexagon(RelocationRef R, uint64_t S, uint64_t A) {
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if (R.getType() == ELF::R_HEX_32)
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return S + getELFAddend(R);
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llvm_unreachable("Invalid relocation type");
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}
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static bool supportsRISCV(uint64_t Type) {
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switch (Type) {
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case ELF::R_RISCV_NONE:
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case ELF::R_RISCV_32:
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case ELF::R_RISCV_64:
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case ELF::R_RISCV_ADD8:
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case ELF::R_RISCV_SUB8:
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case ELF::R_RISCV_ADD16:
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case ELF::R_RISCV_SUB16:
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case ELF::R_RISCV_ADD32:
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case ELF::R_RISCV_SUB32:
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case ELF::R_RISCV_ADD64:
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case ELF::R_RISCV_SUB64:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveRISCV(RelocationRef R, uint64_t S, uint64_t A) {
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int64_t RA = getELFAddend(R);
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switch (R.getType()) {
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case ELF::R_RISCV_NONE:
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return A;
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case ELF::R_RISCV_32:
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return (S + RA) & 0xFFFFFFFF;
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case ELF::R_RISCV_64:
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return S + RA;
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case ELF::R_RISCV_ADD8:
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return (A + (S + RA)) & 0xFF;
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case ELF::R_RISCV_SUB8:
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return (A - (S + RA)) & 0xFF;
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case ELF::R_RISCV_ADD16:
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return (A + (S + RA)) & 0xFFFF;
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case ELF::R_RISCV_SUB16:
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return (A - (S + RA)) & 0xFFFF;
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case ELF::R_RISCV_ADD32:
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return (A + (S + RA)) & 0xFFFFFFFF;
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case ELF::R_RISCV_SUB32:
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return (A - (S + RA)) & 0xFFFFFFFF;
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case ELF::R_RISCV_ADD64:
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return (A + (S + RA));
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case ELF::R_RISCV_SUB64:
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return (A - (S + RA));
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsCOFFX86(uint64_t Type) {
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switch (Type) {
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case COFF::IMAGE_REL_I386_SECREL:
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case COFF::IMAGE_REL_I386_DIR32:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveCOFFX86(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case COFF::IMAGE_REL_I386_SECREL:
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case COFF::IMAGE_REL_I386_DIR32:
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return (S + A) & 0xFFFFFFFF;
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsCOFFX86_64(uint64_t Type) {
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switch (Type) {
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case COFF::IMAGE_REL_AMD64_SECREL:
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case COFF::IMAGE_REL_AMD64_ADDR64:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveCOFFX86_64(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case COFF::IMAGE_REL_AMD64_SECREL:
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return (S + A) & 0xFFFFFFFF;
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case COFF::IMAGE_REL_AMD64_ADDR64:
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return S + A;
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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static bool supportsMachOX86_64(uint64_t Type) {
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return Type == MachO::X86_64_RELOC_UNSIGNED;
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}
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static uint64_t resolveMachOX86_64(RelocationRef R, uint64_t S, uint64_t A) {
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if (R.getType() == MachO::X86_64_RELOC_UNSIGNED)
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return S;
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llvm_unreachable("Invalid relocation type");
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}
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static bool supportsWasm32(uint64_t Type) {
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switch (Type) {
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case wasm::R_WASM_FUNCTION_INDEX_LEB:
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case wasm::R_WASM_TABLE_INDEX_SLEB:
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case wasm::R_WASM_TABLE_INDEX_I32:
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case wasm::R_WASM_MEMORY_ADDR_LEB:
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case wasm::R_WASM_MEMORY_ADDR_SLEB:
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case wasm::R_WASM_MEMORY_ADDR_I32:
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case wasm::R_WASM_TYPE_INDEX_LEB:
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case wasm::R_WASM_GLOBAL_INDEX_LEB:
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case wasm::R_WASM_FUNCTION_OFFSET_I32:
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case wasm::R_WASM_SECTION_OFFSET_I32:
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case wasm::R_WASM_EVENT_INDEX_LEB:
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return true;
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default:
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return false;
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}
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}
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static uint64_t resolveWasm32(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case wasm::R_WASM_FUNCTION_INDEX_LEB:
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case wasm::R_WASM_TABLE_INDEX_SLEB:
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case wasm::R_WASM_TABLE_INDEX_I32:
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case wasm::R_WASM_MEMORY_ADDR_LEB:
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case wasm::R_WASM_MEMORY_ADDR_SLEB:
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case wasm::R_WASM_MEMORY_ADDR_I32:
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case wasm::R_WASM_TYPE_INDEX_LEB:
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case wasm::R_WASM_GLOBAL_INDEX_LEB:
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case wasm::R_WASM_FUNCTION_OFFSET_I32:
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case wasm::R_WASM_SECTION_OFFSET_I32:
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case wasm::R_WASM_EVENT_INDEX_LEB:
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// For wasm section, its offset at 0 -- ignoring Value
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return A;
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default:
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llvm_unreachable("Invalid relocation type");
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}
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}
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std::pair<bool (*)(uint64_t), RelocationResolver>
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getRelocationResolver(const ObjectFile &Obj) {
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if (Obj.isCOFF()) {
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if (Obj.getBytesInAddress() == 8)
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return {supportsCOFFX86_64, resolveCOFFX86_64};
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return {supportsCOFFX86, resolveCOFFX86};
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} else if (Obj.isELF()) {
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if (Obj.getBytesInAddress() == 8) {
|
|
switch (Obj.getArch()) {
|
|
case Triple::x86_64:
|
|
return {supportsX86_64, resolveX86_64};
|
|
case Triple::aarch64:
|
|
case Triple::aarch64_be:
|
|
return {supportsAArch64, resolveAArch64};
|
|
case Triple::bpfel:
|
|
case Triple::bpfeb:
|
|
return {supportsBPF, resolveBPF};
|
|
case Triple::mips64el:
|
|
case Triple::mips64:
|
|
return {supportsMips64, resolveMips64};
|
|
case Triple::ppc64le:
|
|
case Triple::ppc64:
|
|
return {supportsPPC64, resolvePPC64};
|
|
case Triple::systemz:
|
|
return {supportsSystemZ, resolveSystemZ};
|
|
case Triple::sparcv9:
|
|
return {supportsSparc64, resolveSparc64};
|
|
case Triple::amdgcn:
|
|
return {supportsAmdgpu, resolveAmdgpu};
|
|
case Triple::riscv64:
|
|
return {supportsRISCV, resolveRISCV};
|
|
default:
|
|
return {nullptr, nullptr};
|
|
}
|
|
}
|
|
|
|
// 32-bit object file
|
|
assert(Obj.getBytesInAddress() == 4 &&
|
|
"Invalid word size in object file");
|
|
|
|
switch (Obj.getArch()) {
|
|
case Triple::x86:
|
|
return {supportsX86, resolveX86};
|
|
case Triple::ppc:
|
|
return {supportsPPC32, resolvePPC32};
|
|
case Triple::arm:
|
|
case Triple::armeb:
|
|
return {supportsARM, resolveARM};
|
|
case Triple::avr:
|
|
return {supportsAVR, resolveAVR};
|
|
case Triple::lanai:
|
|
return {supportsLanai, resolveLanai};
|
|
case Triple::mipsel:
|
|
case Triple::mips:
|
|
return {supportsMips32, resolveMips32};
|
|
case Triple::sparc:
|
|
return {supportsSparc32, resolveSparc32};
|
|
case Triple::hexagon:
|
|
return {supportsHexagon, resolveHexagon};
|
|
case Triple::riscv32:
|
|
return {supportsRISCV, resolveRISCV};
|
|
default:
|
|
return {nullptr, nullptr};
|
|
}
|
|
} else if (Obj.isMachO()) {
|
|
if (Obj.getArch() == Triple::x86_64)
|
|
return {supportsMachOX86_64, resolveMachOX86_64};
|
|
return {nullptr, nullptr};
|
|
} else if (Obj.isWasm()) {
|
|
if (Obj.getArch() == Triple::wasm32)
|
|
return {supportsWasm32, resolveWasm32};
|
|
return {nullptr, nullptr};
|
|
}
|
|
|
|
llvm_unreachable("Invalid object file");
|
|
}
|
|
|
|
} // namespace object
|
|
} // namespace llvm
|