bb3f5e1fed
Following discussions in #110443, and the following earlier discussions in https://lists.llvm.org/pipermail/llvm-dev/2017-October/117907.html, https://reviews.llvm.org/D38482, https://reviews.llvm.org/D38489, this PR attempts to overhaul the `TargetMachine` and `LLVMTargetMachine` interface classes. More specifically: 1. Makes `TargetMachine` the only class implemented under `TargetMachine.h` in the `Target` library. 2. `TargetMachine` contains target-specific interface functions that relate to IR/CodeGen/MC constructs, whereas before (at least on paper) it was supposed to have only IR/MC constructs. Any Target that doesn't want to use the independent code generator simply does not implement them, and returns either `false` or `nullptr`. 3. Renames `LLVMTargetMachine` to `CodeGenCommonTMImpl`. This renaming aims to make the purpose of `LLVMTargetMachine` clearer. Its interface was moved under the CodeGen library, to further emphasis its usage in Targets that use CodeGen directly. 4. Makes `TargetMachine` the only interface used across LLVM and its projects. With these changes, `CodeGenCommonTMImpl` is simply a set of shared function implementations of `TargetMachine`, and CodeGen users don't need to static cast to `LLVMTargetMachine` every time they need a CodeGen-specific feature of the `TargetMachine`. 5. More importantly, does not change any requirements regarding library linking. cc @arsenm @aeubanks
78 lines
2.0 KiB
C++
78 lines
2.0 KiB
C++
#include "llvm/Target/TargetOptions.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/LegacyPassManager.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/TargetSelect.h"
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#include "llvm/Target/TargetMachine.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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namespace llvm {
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void initializeTestPassPass(PassRegistry &);
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}
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namespace {
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void initLLVM() {
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InitializeAllTargets();
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InitializeAllTargetMCs();
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InitializeAllAsmPrinters();
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InitializeAllAsmParsers();
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PassRegistry *Registry = PassRegistry::getPassRegistry();
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initializeCore(*Registry);
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initializeCodeGen(*Registry);
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}
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/// Create a TargetMachine. We need a target that doesn't have IPRA enabled by
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/// default. That turns out to be all targets at the moment, so just use X86.
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std::unique_ptr<TargetMachine> createTargetMachine(bool EnableIPRA) {
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Triple TargetTriple("x86_64--");
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std::string Error;
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const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
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if (!T)
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return nullptr;
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TargetOptions Options;
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Options.EnableIPRA = EnableIPRA;
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return std::unique_ptr<TargetMachine>(
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T->createTargetMachine("X86", "", "", Options, std::nullopt, std::nullopt,
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CodeGenOptLevel::Aggressive));
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}
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typedef std::function<void(bool)> TargetOptionsTest;
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static void targetOptionsTest(bool EnableIPRA) {
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std::unique_ptr<TargetMachine> TM = createTargetMachine(EnableIPRA);
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// This test is designed for the X86 backend; stop if it is not available.
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if (!TM)
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GTEST_SKIP();
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legacy::PassManager PM;
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TargetPassConfig *TPC = TM->createPassConfig(PM);
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(void)TPC;
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ASSERT_TRUE(TM->Options.EnableIPRA == EnableIPRA);
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delete TPC;
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}
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} // End of anonymous namespace.
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TEST(TargetOptionsTest, IPRASetToOff) {
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targetOptionsTest(false);
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}
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TEST(TargetOptionsTest, IPRASetToOn) {
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targetOptionsTest(true);
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}
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int main(int argc, char **argv) {
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::testing::InitGoogleTest(&argc, argv);
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initLLVM();
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return RUN_ALL_TESTS();
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}
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