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llvm-project
/
llvm
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test
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CodeGen
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Mips
/
GlobalISel
History
Matt Arsenault
20c43d6bd5
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
..
instruction-select
[MIPS GlobalISel] Select 4 byte unaligned load and store
2020-02-19 11:57:06 +01:00
irtranslator
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
legalizer
[GlobalISel] Fix multiply with overflow intrinsics legalization generating invalid MIR.
2020-09-29 18:40:58 -07:00
llvm-ir
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
mips-prelegalizer-combiner
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
regbankselect
[MIPS GlobalISel] Select 4 byte unaligned load and store
2020-02-19 11:57:06 +01:00
