Peter Waller 4604441386 [SVE][CodeGen][DAGCombiner] Fix TypeSize warning in redundant store elimination ...

The modified code in visitSTORE was missing a scalable vector check, and still
using the now deprecated implicit cast of TypeSize to uint64_t through the
overloaded operator. This patch fixes these issues.

This brings the logic in line with the comment on the context line immediately
above the added precondition.

Add a test in Redundantstores.ll that the warning is not triggered.

2020-10-26 16:23:42 +00:00

..

AArch64

[SVE][CodeGen][DAGCombiner] Fix TypeSize warning in redundant store elimination

2020-10-26 16:23:42 +00:00

AMDGPU

[DAGCombine] Add test case showing incorrect DAGCombine optimization

2020-10-26 12:37:31 +00:00

ARC

[ARC] Update brcc test.

2020-08-28 17:07:25 -07:00

ARM

[PrologEpilogInserter] Reduce PR16393 test and fix a prologue parameter in a debuginfo test

2020-10-18 22:18:42 -07:00

AVR

[AVR] fix interrupt stack pointer restoration

2020-10-01 18:52:13 +13:00

BPF

[BPF] Make BPFAbstractMemberAccessPass required

2020-10-09 11:26:37 -07:00

Generic

[Annotation] Allows annotation to carry some additional constant arguments.

2020-10-26 10:50:05 +01:00

Hexagon

[Hexagon] Handle selection between HVX vector predicates

2020-10-23 18:22:03 -05:00

Inputs

…

Lanai

…

Mips

[DAG][ARM][MIPS][RISCV] Improve funnel shift promotion to use 'double shift' patterns

2020-10-12 14:11:02 +01:00

MIR

Revert "[AMDGPU] Reorganize GCN subtarget features for unaligned access"

2020-09-29 15:33:34 +02:00

MSP430

…

NVPTX

[TargetLowering] Check boolean content when folding bit compare

2020-10-21 11:46:55 +01:00

PowerPC

[PowerPC] Add test case for pr47830. NFC.

2020-10-26 09:11:33 +00:00

RISCV

[RISCV][NFC] Add more tests for 32-bit constant materialization

2020-10-22 11:36:34 +01:00

SPARC

[Sparc] Remove cast that truncates immediate operands to 32 bits.

2020-10-02 20:14:55 -04:00

SystemZ

[SystemZ] Define MaxInstLength to have the value of 6.

2020-10-24 09:19:34 +02:00

Thumb

…

Thumb2

Revert "[ARM][LowOverheadLoops] Adjust Start insertion."

2020-10-20 08:55:21 +01:00

VE

[VE] Support atomic store

2020-10-27 00:28:11 +09:00

WebAssembly

[WebAssembly] Prototype i8x16.popcnt

2020-10-15 21:18:22 +00:00

WinCFGuard

Reland [CFGuard] Add address-taken IAT tables and delay-load support

2020-10-13 13:20:52 -07:00

WinEH

…

X86

[X86] Use mtriple instead of march in MIR tests

2020-10-26 15:31:33 +00:00

XCore

…