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llvm-project/llvm/test/CodeGen
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Matt Arsenault 49ae0fc2f0 GlobalISel: Fix incorrect lowering G_FCOPYSIGN 
In the basic case, this was reading the sign from the wrong operand.
2020-04-10 21:00:25 -04:00
..
AArch64
Add -debugify-and-strip-all to add debug info before a pass and remove it after
2020-04-10 16:36:07 -07:00
AMDGPU
GlobalISel: Fix incorrect lowering G_FCOPYSIGN
2020-04-10 21:00:25 -04:00
ARC
…
ARM
Re-land [Codegen/Statepoint] Allow usage of registers for non gc deopt values.
2020-04-10 10:13:39 +07:00
AVR
[AVR] Generalize the previous interrupt bugfix to signal handlers too
2020-03-31 19:33:34 +13:00
BPF
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
Generic
[mir-strip-debug] Optionally preserve debug info that wasn't from debugify/mir-debugify
2020-04-10 15:24:14 -07:00
Hexagon
[Pipeliner] Fix the bug in pragma that disables the pipeliner.
2020-04-10 12:52:16 -05:00
Inputs
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Lanai
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
Mips
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
MIR
AMDGPU: Assume f32 denormals are enabled by default
2020-04-02 17:17:12 -04:00
MSP430
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NVPTX
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
PowerPC
[PowerPC][NFC] Add test for 5b18b6e9a84d985c0a907009fb71de7c1943bc88
2020-04-10 11:41:03 -05:00
RISCV
[LegalizeTypes][RISCV] Correctly sign-extend comparison for ATOMIC_CMP_XCHG
2020-04-01 15:51:26 +01:00
SPARC
[Sparc] Fix incorrect operand for matching CMPri pattern
2020-03-02 11:36:32 +08:00
SystemZ
[LoopDataPrefetch + SystemZ] Let target decide on prefetching for each loop.
2020-04-02 14:57:46 +02:00
Thumb
[ARM] unwinding .pad instructions missing in execute-only prologue
2020-04-07 11:51:59 +01:00
Thumb2
[ARM][MVE] Optimise offset addresses of gathers/scatters
2020-04-08 11:46:57 +01:00
VE
[VE] Support (m)0 and (m)1 operands
2020-04-09 18:09:00 +02:00
WebAssembly
[WebAssembly] Use dummy debug info in Emscripten SjLj
2020-04-09 18:44:50 -07:00
WinCFGuard
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WinEH
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X86
[x86] add test for FP->int->FP casts; NFC (PR36617)
2020-04-10 15:57:35 -04:00
XCore
[XCore] Add instruction pattern for bitrev
2020-02-21 09:28:49 +08:00