llvm-project

2007-01-31-RegInfoAssert.ll

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2007-02-02-JoinIntervalsCrash.ll

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2007-05-05-InvalidPushPop.ll

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2009-06-18-ThumbCommuteMul.ll

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2009-07-20-TwoAddrBug.ll

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2009-07-27-PEIAssert.ll

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2009-08-12-ConstIslandAssert.ll

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2009-08-12-RegInfoAssert.ll

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2009-08-20-ISelBug.ll

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2009-12-17-pre-regalloc-taildup.ll

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2010-06-18-SibCallCrash.ll

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2010-07-01-FuncAlign.ll

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2010-07-15-debugOrdering.ll

In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.

2017-03-14 00:34:14 +00:00

2011-05-11-DAGLegalizer.ll

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2011-06-16-NoGPRs.ll

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2011-EpilogueBug.ll

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2012-04-26-M0ISelBug.ll

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2014-06-10-thumb1-ldst-opt-bug.ll

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and_neg.ll

Add a regression test for PR28348.

2016-06-29 17:34:31 +00:00

asmprinter-bug.ll

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barrier.ll

ARM: stop emitting blx instructions for most calls on MachO.

2016-05-10 19:17:47 +00:00

bic_imm.ll

[Thumb] Reapply r272251 with a fix for PR28348 (mk 2)

2016-07-05 12:37:13 +00:00

callee_save.ll

Re-land "[Thumb] Save/restore high registers in Thumb1 pro/epilogues"

2016-10-11 21:14:03 +00:00

cmp-add-fold.ll

In Thumb1 mode, the custom lowering for ARMISD::CMPZ could never emit tADDi3

2017-02-17 18:59:16 +00:00

cmp-fold.ll

[Thumb1] Teach optimizeCompareInstr about thumb1 compares

2016-09-09 09:51:06 +00:00

constants.ll

[Thumb] Fix off-by-one error in r272007

2016-06-14 13:33:07 +00:00

copy_thumb.ll

In Thumb1, materialize a move between low registers as a movs, if CPSR isn't live.

2017-03-07 09:38:16 +00:00

cortex-m0-unaligned-access.ll

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DbgValueOtherTargets.test

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dyn-stackalloc.ll

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fastcc.ll

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fpconv.ll

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fpow.ll

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frame_thumb.ll

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iabs.ll

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inlineasm-imm-thumb.ll

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inlineasm-thumb.ll

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ispositive.ll

[ARM] t2_so_imm_neg had a subtle bug in the conversion, and could trigger UB by negating (int)-2147483648. By pure luck, none of the pre-existing tests triggered this; so I'm adding one.

2017-03-22 15:09:30 +00:00

large-stack.ll

Re-land "[Thumb] Save/restore high registers in Thumb1 pro/epilogues"

2016-10-11 21:14:03 +00:00

ldm-merge-call.ll

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ldm-merge-struct.ll

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ldm-stm-base-materialization-thumb2.ll

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ldm-stm-base-materialization.ll

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ldm-stm-postinc.ll

[Thumb-1] Select post-increment load and store where possible

2016-07-15 08:03:56 +00:00

ldr_ext.ll

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ldr_frame.ll

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lit.local.cfg

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long_shift.ll

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long-setcc.ll

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long.ll

[Thumb1] The recently added tADCS and tSBCS pseudo-instructions were missing Uses = [CPSR]

2017-04-21 07:35:21 +00:00

machine-cse-physreg.mir

Move machine-cse-physreg.mir to test/CodeGen/Thumb

2017-05-24 17:20:47 +00:00

mature-mc-support.ll

[LLC] Add an inline assembly diagnostics handler.

2017-02-03 11:14:39 +00:00

mul.ll

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optionaldef-scheduling.ll

[ARM] ScheduleDAGRRList::DelayForLiveRegsBottomUp must consider OptionalDefs

2017-04-23 06:58:08 +00:00

pop.ll

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PR17309.ll

Add address space mangling to lifetime intrinsics

2017-04-10 20:18:21 +00:00

push.ll

[ARM] Generate consistent frame records for Thumb2

2016-08-23 09:19:22 +00:00

remove-unneeded-push-pop.ll

[ARM] Fix constant islands pass.

2017-02-22 09:06:21 +00:00

rev.ll

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segmented-stacks-dynamic.ll

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segmented-stacks.ll

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select.ll

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sjljehprepare-lower-vector.ll

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stack_guard_remat.ll

Add address space mangling to lifetime intrinsics

2017-04-10 20:18:21 +00:00

stack-access.ll

Elide stores which are overwritten without being observed.

2017-05-16 19:43:56 +00:00

stack-coloring-without-frame-ptr.ll

Add address space mangling to lifetime intrinsics

2017-04-10 20:18:21 +00:00

stack-frame.ll

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stm-deprecated.ll

[ARM] Don't generate deprecated T1 STM.

2017-02-28 23:32:55 +00:00

stm-merge.ll

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tbb-reuse.mir

[Thumb-1] TBB generation: spot redefinitions of index register

2017-02-13 14:07:39 +00:00

thumb-imm.ll

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thumb-ldm.ll

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thumb-shrink-wrapping.ll

In Thumb1, materialize a move between low registers as a movs, if CPSR isn't live.

2017-03-07 09:38:16 +00:00

trap.ll

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triple.ll

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tst_teq.ll

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unord.ll

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vargs.ll

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