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llvm-project/llvm/test/CodeGen
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Kirill Bobyrev 014728413f Revert "[Hexagon] Improve casting of boolean HVX vectors to scalars" 
This reverts commit 7691790dfd1011d08f5468f63952d7690755aad4.

The patch is failing tests with MSAN:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/39054/steps/check-llvm%20msan/logs/stdio
2020-02-27 11:58:32 +01:00
..
AArch64
[AArch64] Peephole optimization: merge AND and TST instructions
2020-02-27 09:23:47 +00:00
AMDGPU
AMDGPU/GlobalISel: Add missing test for G_UMULH
2020-02-26 22:30:13 -05:00
ARC
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ARM
[ARM] Add CPSR as an implicit use of t2IT
2020-02-27 10:10:40 +00:00
AVR
[AVR] Fix private label prefix
2020-02-26 20:32:25 +01:00
BPF
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
Generic
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
Hexagon
Revert "[Hexagon] Improve casting of boolean HVX vectors to scalars"
2020-02-27 11:58:32 +01:00
Inputs
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Lanai
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
Mips
[MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store
2020-02-19 12:02:27 +01:00
MIR
[ARM] Add CPSR as an implicit use of t2IT
2020-02-27 10:10:40 +00:00
MSP430
…
NVPTX
[NVPTX, LSV] Move the LSV optimization pass to later when the graph is cleaner
2020-02-13 12:15:38 -08:00
PowerPC
[PowerPC][NFC] Convert grep usage to FileCheck in lit test.
2020-02-26 12:28:18 -05:00
RISCV
[RISCV] Implement mayBeEmittedAsTailCall for tail call optimization
2020-02-18 23:56:42 +08:00
SPARC
Emit register names in cfi assembly directives
2020-02-25 14:00:01 -05:00
SystemZ
[LegalizeTypes] Scalarize non-byte sized loads in WidenRecRes_Load and SplitVecResLoad
2020-02-24 15:14:33 -08:00
Thumb
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
Thumb2
[ARM] Add CPSR as an implicit use of t2IT
2020-02-27 10:10:40 +00:00
VE
[VE] TLS codegen
2020-02-18 16:09:12 +01:00
WebAssembly
[WebAssembly] Simplify extract_vector lowering
2020-02-25 13:54:48 -08:00
WinCFGuard
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WinEH
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X86
[X86] Add test cases showing incorrect setting of nofpexcept flag due to CSE occuring during SelectionDAG creation.
2020-02-26 18:10:27 -08:00
XCore
[XCore] Add instruction pattern for bitrev
2020-02-21 09:28:49 +08:00