50aeeed8a2
We have spv.entry_point_abi for specifying the local workgroup size. It should be decorated onto input gpu.func ops to drive the SPIR-V CodeGen to generate the proper SPIR-V module execution mode. Compared to using command-line options for specifying the configuration, using attributes also has the benefits that 1) we are now able to use different local workgroup for different entry points and 2) the tests contains the configuration directly. Differential Revision: https://reviews.llvm.org/D74012
44 lines
2.0 KiB
MLIR
44 lines
2.0 KiB
MLIR
// RUN: mlir-opt -convert-gpu-to-spirv %s -o - | FileCheck %s
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module attributes {gpu.container_module} {
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func @loop(%arg0 : memref<10xf32>, %arg1 : memref<10xf32>) {
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%c0 = constant 1 : index
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"gpu.launch_func"(%c0, %c0, %c0, %c0, %c0, %c0, %arg0, %arg1) { kernel = "loop_kernel", kernel_module = @kernels} : (index, index, index, index, index, index, memref<10xf32>, memref<10xf32>) -> ()
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return
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}
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gpu.module @kernels {
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gpu.func @loop_kernel(%arg2 : memref<10xf32>, %arg3 : memref<10xf32>)
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attributes {gpu.kernel, spv.entry_point_abi = {local_size = dense<[16, 1, 1]>: vector<3xi32>}} {
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// CHECK: [[LB:%.*]] = spv.constant 4 : i32
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%lb = constant 4 : index
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// CHECK: [[UB:%.*]] = spv.constant 42 : i32
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%ub = constant 42 : index
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// CHECK: [[STEP:%.*]] = spv.constant 2 : i32
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%step = constant 2 : index
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// CHECK: spv.loop {
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// CHECK-NEXT: spv.Branch [[HEADER:\^.*]]([[LB]] : i32)
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// CHECK: [[HEADER]]([[INDVAR:%.*]]: i32):
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// CHECK: [[CMP:%.*]] = spv.SLessThan [[INDVAR]], [[UB]] : i32
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// CHECK: spv.BranchConditional [[CMP]], [[BODY:\^.*]], [[MERGE:\^.*]]
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// CHECK: [[BODY]]:
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// CHECK: [[STRIDE1:%.*]] = spv.constant 1 : i32
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// CHECK: [[OFFSET1:%.*]] = spv.IMul [[STRIDE1]], [[INDVAR]] : i32
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// CHECK: spv.AccessChain {{%.*}}{{\[}}{{%.*}}, [[OFFSET1]]{{\]}} : {{.*}}
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// CHECK: [[STRIDE2:%.*]] = spv.constant 1 : i32
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// CHECK: [[OFFSET2:%.*]] = spv.IMul [[STRIDE2]], [[INDVAR]] : i32
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// CHECK: spv.AccessChain {{%.*}}{{\[}}{{%.*}}, [[OFFSET2]]{{\]}} : {{.*}}
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// CHECK: [[INCREMENT:%.*]] = spv.IAdd [[INDVAR]], [[STEP]] : i32
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// CHECK: spv.Branch [[HEADER]]([[INCREMENT]] : i32)
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// CHECK: [[MERGE]]
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// CHECK: spv._merge
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// CHECK: }
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loop.for %arg4 = %lb to %ub step %step {
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%1 = load %arg2[%arg4] : memref<10xf32>
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store %1, %arg3[%arg4] : memref<10xf32>
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}
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gpu.return
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}
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}
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}
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