4be4133a9f
There's little point to trying to commute an instruction if the two operands are already the same. This avoids an assertion in a future patch, but this likely isn't the correct fix. The worklist management in SIFoldOperands is dodgy, and we should probably fix it to work like PeepholeOpt (i.e. stop looking at use lists, and fold from users). This is an extension of the already handled special case which it's trying to avoid folding an instruction which is already being folded.
64 lines
2.7 KiB
YAML
64 lines
2.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -run-pass=peephole-opt,si-fold-operands -o - %s | FileCheck %s
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# Check for assert when trying later folds after commuting an
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# instruction where both operands are the same register. This depended
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# on use list ordering, so we need to run peephole-opt first to
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# reproduce.
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---
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name: commute_add_same_inputs_assert
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; CHECK-LABEL: name: commute_add_same_inputs_assert
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; CHECK-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 0, killed [[COPY]], implicit-def $vcc, implicit $exec
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; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: [[V_ADDC_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 0, [[V_MOV_B32_e32_]], implicit-def $vcc, implicit $vcc, implicit $exec
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; CHECK-NEXT: $vgpr4 = COPY [[V_ADDC_U32_e32_]]
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; CHECK-NEXT: SI_RETURN implicit $vgpr4
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%0:vgpr_32 = COPY $vgpr0
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%1:sreg_64 = S_MOV_B64 0
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%2:sreg_32 = COPY %1.sub0
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%3:vgpr_32 = V_ADD_CO_U32_e32 %2, killed %0, implicit-def $vcc, implicit $exec
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%4:vgpr_32 = COPY %2
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%5:vgpr_32 = COPY %2
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%6:vgpr_32 = V_ADDC_U32_e32 %4, %5, implicit-def $vcc, implicit $vcc, implicit $exec
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$vgpr4 = COPY %6
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SI_RETURN implicit $vgpr4
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...
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---
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name: commute_sub_same_inputs_assert
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; CHECK-LABEL: name: commute_sub_same_inputs_assert
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; CHECK-NEXT: [[V_SUB_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_SUB_CO_U32_e32 0, killed [[COPY]], implicit-def $vcc, implicit $exec
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; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: [[V_SUBB_U32_e32_:%[0-9]+]]:vgpr_32 = V_SUBB_U32_e32 0, [[V_MOV_B32_e32_]], implicit-def $vcc, implicit $vcc, implicit $exec
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; CHECK-NEXT: $vgpr4 = COPY [[V_SUBB_U32_e32_]]
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; CHECK-NEXT: SI_RETURN implicit $vgpr4
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%0:vgpr_32 = COPY $vgpr0
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%1:sreg_64 = S_MOV_B64 0
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%2:sreg_32 = COPY %1.sub0
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%3:vgpr_32 = V_SUB_CO_U32_e32 %2, killed %0, implicit-def $vcc, implicit $exec
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%4:vgpr_32 = COPY %2
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%5:vgpr_32 = COPY %2
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%6:vgpr_32 = V_SUBB_U32_e32 %5, %4, implicit-def $vcc, implicit $vcc, implicit $exec
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$vgpr4 = COPY %6
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SI_RETURN implicit $vgpr4
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...
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