Zoran Jovanovic 366783e14c [mips][microMIPS] Create microMIPS64r6 subtarget and implement DALIGN, DAUI, DAHI, DATI, DEXT, DEXTM and DEXTU instructions ...

Differential Revision: http://reviews.llvm.org/D10923

llvm-svn: 244744

2015-08-12 12:45:16 +00:00

..

AArch64

[AArch64] Fix problems in decoding generic MSR instructions

2015-07-15 08:10:30 +00:00

ARM

[ARM] Add v8.1a "Privileged Access Never" extension

2015-04-16 11:34:25 +00:00

Hexagon

[Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.

2015-06-10 16:52:32 +00:00

Mips

[mips][microMIPS] Create microMIPS64r6 subtarget and implement DALIGN, DAUI, DAHI, DATI, DEXT, DEXTM and DEXTU instructions

2015-08-12 12:45:16 +00:00

PowerPC

[PPC] Disassemble little endian ppc instructions in the right byte order

2015-07-15 12:56:19 +00:00

Sparc

[Sparc] Implement i64 load/store support for 32-bit sparc.

2015-08-10 19:11:39 +00:00

SystemZ

[SystemZ] Add z13 vector facility and MC support

2015-05-05 19:23:40 +00:00

X86

[X86]: Correctly sign-extend 16-bit immediate in CALL instruction.

2015-06-26 16:58:59 +00:00

XCore

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00