shylie/llvm-project

History

Srinivasa Ravi 63231ebfe7

[MLIR][NVVM] Add new narrow FP convert Ops (#184291 )

This change adds the following NVVM Ops for new narrow FP conversions
introduced in PTX 9.1:
- `convert.{f32x2/bf16x2}.to.s2f6x2`
- `convert.s2f6x2.to.bf16x2`
- `convert.bf16x2.to.f8x2` (extended for `f8E4M3FN` and `f8E5M2` types)
- `convert.{f16x2/bf16x2}.to.f6x2`
- `convert.{f16x2/bf16x2}.to.f4x2`

PTX ISA Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt

2026-04-06 12:06:25 +05:30

..

benchmark/python

…

[mlir-python] Fix duplicate EnumAttr builder registration across dialects. (#187191 )

2026-03-19 21:02:23 -07:00

[mlir][GPU] Add constant address space to GPU dialect (#190211 )

2026-04-02 15:02:12 -04:00

[MLIR] Add missing dialects to C API (#82190 )

2026-01-07 12:51:33 -08:00

[MLIR][NVVM] Add new narrow FP convert Ops (#184291 )

2026-04-06 12:06:25 +05:30

[MLIR][NVVM] Add new narrow FP convert Ops (#184291 )

2026-04-06 12:06:25 +05:30

[MLIR][Python] Add more field specifiers to Python-defined operations (#188064 )

2026-03-28 21:46:21 +08:00

[MLIR][NVVM] Add new narrow FP convert Ops (#184291 )

2026-04-06 12:06:25 +05:30

[mlir][ods] resolve the wrong indent issue (#189277 )

2026-04-01 15:20:54 +02:00

[MLIR] Validate APInt bitwidth in IntegerAttr::get(Type, APInt) (#188725 )

2026-04-01 10:47:36 +02:00

[mlir] Fix generate-test-checks.py: don't put attr refs in CHECK-LABEL (#188985 )

2026-03-27 14:59:42 +01:00

.clang-format

Enforce Unix line endings for Clang/LLVM/MLIR projects (#161460 )

2025-10-02 06:09:12 -07:00

.clang-tidy

[MLIR][NFC] Ignore clang-tidy modernize-use-using check in C code (#180326 )

2026-02-09 13:24:08 +08:00

CMakeLists.txt

[mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (#182652 )

2026-03-13 22:03:05 +00:00

LICENSE.TXT

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Maintainers.md

[mlir][x86] Move AMX dialect into X86 dialect (#183717 )

2026-03-02 11:47:30 +01:00

README.md

…

README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.