48904e9452
Summary: This catches malformed mir files which specify alignment as log2 instead of pow2. See https://reviews.llvm.org/D65945 for reference, This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67433 llvm-svn: 371608
304 lines
10 KiB
YAML
304 lines
10 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
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--- |
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define void @float_in_fpr() {entry: ret void}
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define void @double_in_fpr() {entry: ret void}
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define void @float_in_gpr() {entry: ret void}
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define void @double_in_gpr() {entry: ret void}
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define void @call_float_in_fpr() {entry: ret void}
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define void @call_double_in_fpr() {entry: ret void}
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define void @call_float_in_gpr() {entry: ret void}
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define void @call_double_in_gpr() {entry: ret void}
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...
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---
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name: float_in_fpr
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $f12, $f14
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; FP32-LABEL: name: float_in_fpr
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; FP32: liveins: $f12, $f14
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; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f14
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; FP32: $f0 = COPY [[COPY]]
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; FP32: RetRA implicit $f0
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; FP64-LABEL: name: float_in_fpr
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; FP64: liveins: $f12, $f14
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; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f14
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; FP64: $f0 = COPY [[COPY]]
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; FP64: RetRA implicit $f0
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%1:fprb(s32) = COPY $f14
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$f0 = COPY %1(s32)
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RetRA implicit $f0
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...
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---
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name: double_in_fpr
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $d6, $d7
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; FP32-LABEL: name: double_in_fpr
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; FP32: liveins: $d6, $d7
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; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d7
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; FP32: $d0 = COPY [[COPY]]
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; FP32: RetRA implicit $d0
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; FP64-LABEL: name: double_in_fpr
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; FP64: liveins: $d6, $d7
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; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d7
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; FP64: $d0 = COPY [[COPY]]
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; FP64: RetRA implicit $d0
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%1:fprb(s64) = COPY $d7
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$d0 = COPY %1(s64)
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RetRA implicit $d0
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...
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---
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name: float_in_gpr
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; FP32-LABEL: name: float_in_gpr
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; FP32: liveins: $a0, $a1
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; FP32: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 $a1
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; FP32: $f0 = COPY [[MTC1_]]
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; FP32: RetRA implicit $f0
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; FP64-LABEL: name: float_in_gpr
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; FP64: liveins: $a0, $a1
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; FP64: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 $a1
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; FP64: $f0 = COPY [[MTC1_]]
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; FP64: RetRA implicit $f0
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%1:fgr32(s32) = MTC1 $a1
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$f0 = COPY %1(s32)
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RetRA implicit $f0
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...
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---
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name: double_in_gpr
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a2, $a3
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; FP32-LABEL: name: double_in_gpr
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; FP32: liveins: $a0, $a2, $a3
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; FP32: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 $a2, $a3
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; FP32: $d0 = COPY [[BuildPairF64_]]
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; FP32: RetRA implicit $d0
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; FP64-LABEL: name: double_in_gpr
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; FP64: liveins: $a0, $a2, $a3
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; FP64: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 $a2, $a3
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; FP64: $d0 = COPY [[BuildPairF64_]]
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; FP64: RetRA implicit $d0
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%1:afgr64(s64) = BuildPairF64 $a2, $a3
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$d0 = COPY %1(s64)
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RetRA implicit $d0
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...
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---
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name: call_float_in_fpr
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $f12, $f14
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; FP32-LABEL: name: call_float_in_fpr
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; FP32: liveins: $f12, $f14
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; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
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; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
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; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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; FP32: $f12 = COPY [[COPY]]
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; FP32: $f14 = COPY [[COPY1]]
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; FP32: JAL @float_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit $f14, implicit-def $f0
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; FP32: [[COPY2:%[0-9]+]]:fgr32 = COPY $f0
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; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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; FP32: $f0 = COPY [[COPY2]]
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; FP32: RetRA implicit $f0
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; FP64-LABEL: name: call_float_in_fpr
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; FP64: liveins: $f12, $f14
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; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
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; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
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; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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; FP64: $f12 = COPY [[COPY]]
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; FP64: $f14 = COPY [[COPY1]]
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; FP64: JAL @float_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit $f14, implicit-def $f0
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; FP64: [[COPY2:%[0-9]+]]:fgr32 = COPY $f0
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; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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; FP64: $f0 = COPY [[COPY2]]
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; FP64: RetRA implicit $f0
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%0:fprb(s32) = COPY $f12
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%1:fprb(s32) = COPY $f14
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ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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$f12 = COPY %0(s32)
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$f14 = COPY %1(s32)
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JAL @float_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit $f14, implicit-def $f0
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%2:fprb(s32) = COPY $f0
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ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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$f0 = COPY %2(s32)
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RetRA implicit $f0
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...
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---
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name: call_double_in_fpr
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $d6, $d7
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; FP32-LABEL: name: call_double_in_fpr
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; FP32: liveins: $d6, $d7
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; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
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; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
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; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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; FP32: $d6 = COPY [[COPY]]
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; FP32: $d7 = COPY [[COPY1]]
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; FP32: JAL @double_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit $d7, implicit-def $d0
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; FP32: [[COPY2:%[0-9]+]]:afgr64 = COPY $d0
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; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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; FP32: $d0 = COPY [[COPY2]]
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; FP32: RetRA implicit $d0
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; FP64-LABEL: name: call_double_in_fpr
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; FP64: liveins: $d6, $d7
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; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
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; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
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; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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; FP64: $d6 = COPY [[COPY]]
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; FP64: $d7 = COPY [[COPY1]]
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; FP64: JAL @double_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit $d7, implicit-def $d0
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; FP64: [[COPY2:%[0-9]+]]:fgr64 = COPY $d0
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; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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; FP64: $d0 = COPY [[COPY2]]
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; FP64: RetRA implicit $d0
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%0:fprb(s64) = COPY $d6
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%1:fprb(s64) = COPY $d7
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ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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$d6 = COPY %0(s64)
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$d7 = COPY %1(s64)
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JAL @double_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit $d7, implicit-def $d0
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%2:fprb(s64) = COPY $d0
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ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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$d0 = COPY %2(s64)
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RetRA implicit $d0
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...
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---
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name: call_float_in_gpr
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; FP32-LABEL: name: call_float_in_gpr
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; FP32: liveins: $a0, $a1
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; FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; FP32: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 $a1
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; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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; FP32: $a0 = COPY [[COPY]]
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; FP32: $a1 = MFC1 [[MTC1_]]
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; FP32: JAL @float_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $f0
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; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f0
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; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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; FP32: $f0 = COPY [[COPY1]]
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; FP32: RetRA implicit $f0
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; FP64-LABEL: name: call_float_in_gpr
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; FP64: liveins: $a0, $a1
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; FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; FP64: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 $a1
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; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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; FP64: $a0 = COPY [[COPY]]
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; FP64: $a1 = MFC1 [[MTC1_]]
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; FP64: JAL @float_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $f0
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; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f0
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; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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; FP64: $f0 = COPY [[COPY1]]
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; FP64: RetRA implicit $f0
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%0:gprb(s32) = COPY $a0
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%1:fgr32(s32) = MTC1 $a1
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ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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$a0 = COPY %0(s32)
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$a1 = MFC1 %1(s32)
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JAL @float_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $f0
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%2:fprb(s32) = COPY $f0
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ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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$f0 = COPY %2(s32)
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RetRA implicit $f0
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...
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---
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name: call_double_in_gpr
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a2, $a3
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; FP32-LABEL: name: call_double_in_gpr
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; FP32: liveins: $a0, $a2, $a3
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; FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; FP32: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 $a2, $a3
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; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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; FP32: $a0 = COPY [[COPY]]
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; FP32: $a3 = ExtractElementF64 [[BuildPairF64_]], 1
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; FP32: $a2 = ExtractElementF64 [[BuildPairF64_]], 0
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; FP32: JAL @double_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $d0
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; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d0
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; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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; FP32: $d0 = COPY [[COPY1]]
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; FP32: RetRA implicit $d0
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; FP64-LABEL: name: call_double_in_gpr
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; FP64: liveins: $a0, $a2, $a3
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; FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; FP64: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 $a2, $a3
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; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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; FP64: $a0 = COPY [[COPY]]
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; FP64: $a3 = ExtractElementF64 [[BuildPairF64_]], 1
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; FP64: $a2 = ExtractElementF64 [[BuildPairF64_]], 0
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; FP64: JAL @double_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $d0
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; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d0
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; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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; FP64: $d0 = COPY [[COPY1]]
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; FP64: RetRA implicit $d0
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%0:gprb(s32) = COPY $a0
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%1:afgr64(s64) = BuildPairF64 $a2, $a3
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ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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$a0 = COPY %0(s32)
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$a3 = ExtractElementF64 %1(s64), 1
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$a2 = ExtractElementF64 %1(s64), 0
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JAL @double_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $d0
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%2:fprb(s64) = COPY $d0
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ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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$d0 = COPY %2(s64)
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RetRA implicit $d0
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...
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