Aart Bik 69a7759b40 [mlir][sparse] implement loop index value vectorization ...

with CHECK and integration test

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D122040

2022-03-21 10:40:38 -07:00

..

Async/CPU

[mlir][linalg] Replace linalg.fill by OpDSL variant.

2022-03-14 10:51:08 +00:00

Linalg/CPU

[mlir] Move the Builtin FuncOp to the Func dialect

2022-03-16 17:07:03 -07:00

LLVMIR/CPU

[mlir][Vector] Add a vblendps-based impl for transpose8x8 (both intrin and inline_asm)

2021-11-23 07:31:22 +00:00

Memref

[mlir][NFC] Rename StandardToLLVM to FuncToLLVM

2022-03-07 11:25:23 -08:00

PDL/CPU

[MLIR][PDL] Integration test of multi-root matching and related fixes.

2022-01-04 08:03:45 +05:30

SparseTensor

[mlir][sparse] implement loop index value vectorization

2022-03-21 10:40:38 -07:00

Standard/CPU

[mlir] Move the Builtin FuncOp to the Func dialect

2022-03-16 17:07:03 -07:00

Vector/CPU

[mlir] Move the Builtin FuncOp to the Func dialect

2022-03-16 17:07:03 -07:00