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llvm-project/llvm/test/TableGen
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Jay Foad 807a82d407
[TableGen] Implement getNamedOperandIdx with another table lookup. NFC. (#151116) 
Use direct table lookup instead of a switch over all opcodes.

In my Release+Asserts build this reduced the code size for
AMDGPU::getNamedOperandIdx from 11422 to 80 bytes, and the total size of
all its tables (including the jump table for the switch) from 243564 to
155020 bytes.
2025-07-30 14:03:26 +01:00
..
Common
…
CompressInstEmitter
[TableGen] Check destination instruction predicates in CompressInstEmitter. (#151061)
2025-07-28 21:36:19 -07:00
FixedLenDecoderEmitter
[LLVM][TableGen][DecoderEmitter] Add wrapper struct for bit_value_t (#146248)
2025-07-01 07:36:17 -07:00
GlobalISelCombinerEmitter
[GlobalISel] Add Saturated Truncate Instructions (#147526)
2025-07-09 18:56:17 +01:00
GlobalISelEmitter
[X86][GlobalISel] Added support for llvm.get.rounding (#147716)
2025-07-11 15:48:18 +02:00
SDNodeInfoEmitter
[test] Split SDNodeInfoEmitter tests into multiple files
2025-07-23 20:27:41 +03:00
64-bit-int.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
2003-08-03-PassCode.td
…
2006-09-18-LargeInt.td
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2010-03-24-PrematureDefaults.td
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AcquireAtCycle.td
[TableGen][MCSched] Update error messages on the range of Acquire/ReleaseAtCycle (#131908)
2025-03-24 13:42:28 -07:00
address-space-patfrags.td
[DAG] Use SDValue for PatFrag checks (#137519)
2025-05-01 08:58:59 +01:00
AliasAsmString.td
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AllowDuplicateRegisterNames.td
[MC][AsmParser] Make MatchRegisterName return MCRegister (NFC) (#81408)
2024-02-18 13:59:49 +03:00
ambiguous-composition.td
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AnonDefinitionOnDemand.td
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anonymous-location.td
[LIT] Rename substitution %basename_s to %{s:basename} (#111062)
2024-10-03 18:18:10 -07:00
arithmetic.td
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ArtificialSubregs.td
[TableGen] Fix calculation of Lanemask for RCs with artificial subregs. (#114392)
2024-11-04 16:10:50 +00:00
AsmPredicateCombining.td
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AsmPredicateCombiningRISCV.td
[RISCV] Don't convert virtual register Register to MCRegister in isCompressibleInst. (#122843)
2025-01-13 23:36:09 -08:00
AsmPredicateCondsEmission.td
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AsmVariant.td
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AsmWriterPCRelOp.td
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assert.td
[TableGen] Print assert message inline with assert failure (#111184)
2024-10-04 13:21:50 -07:00
bare-minimum-psets.td
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BigEncoder.td
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BitOffsetDecoder.td
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BitsInit.td
[TableGen] Add assert to validate Objects list for HwModeSelect (#123794)
2025-01-27 13:44:44 -08:00
BitsInitErrors.td
[TableGen] Add assert to validate Objects list for HwModeSelect (#123794)
2025-01-27 13:44:44 -08:00
BitsInitOverflow.td
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cast-list-initializer.td
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cast-multiclass.td
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cast-string.td
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cast-typeerror.td
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cast.td
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cc-assign-to-reg-tuple.td
[TableGen][NFC] Use early exit to simplify large block in emitAction. (#138220)
2025-05-08 12:12:15 -05:00
check-duplicate-tuple-regs.td
[TableGen] Check for duplicate register tuple definitions. (#95725)
2024-06-25 16:42:29 -05:00
ClassInstanceValue.td
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code.td
…
CodeGenSchedule-duplicate-instrw.td
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compare.td
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CompressWriteLatencyEntry.td
[MC] Use StringTable to reduce dynamic relocations (#144202)
2025-06-25 05:23:11 -07:00
ConcatenatedSubregs.td
[Target][RISCV] Add HwMode support to subregister index size/offset. (#86368)
2024-03-27 12:19:28 -07:00
cond-bitlist.td
…
cond-default.td
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cond-empty-list-arg.td
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cond-inheritance.td
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cond-let.td
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cond-list.td
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cond-subclass.td
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cond-type.td
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cond-usage.td
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condsbit.td
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ConstraintChecking1.td
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ConstraintChecking2.td
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ConstraintChecking3.td
[TableGen] Fix operand constraint checking problem. (#85859)
2024-03-20 13:32:38 -05:00
ConstraintChecking4.td
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ConstraintChecking5.td
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ConstraintChecking6.td
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ConstraintChecking7.td
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ConstraintChecking8.td
[TableGen] Fix operand constraint checking problem. (#85859)
2024-03-20 13:32:38 -05:00
ConstraintChecking.inc
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CStyleComment.td
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dag-functional.td
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dag-isel-complexpattern.td
[SelectionDAG] Add space-optimized forms of OPC_CheckComplexPat (#73310)
2024-01-11 15:28:12 +08:00
dag-isel-instrument.td
[llvm-tblgen] Increase Coverage Index Size (#118329)
2024-12-04 09:19:13 +00:00
dag-isel-regclass-emit-enum.td
[MVT][TableGen] Extend Machine Value Type to uint16_t (#99657)
2024-08-01 01:19:14 +08:00
dag-isel-res-order.td
[SelectionDAG] Add space-optimized forms of OPC_EmitNode/OPC_MorphNodeTo (#73502)
2023-12-12 17:45:32 +08:00
dag-isel-subregs.td
[SelectionDAG] Add instantiated OPC_EmitInteger and OPC_EmitStringInteger (#73241)
2023-11-27 11:08:28 +08:00
dag-subst.td
[TableGen] !subst on a dag should retain name of operator (#141195)
2025-05-23 12:03:56 -07:00
Dag.td
…
DAGDefaultOps.td
[SelectionDAG] Add space-optimized forms of OPC_EmitNode/OPC_MorphNodeTo (#73502)
2023-12-12 17:45:32 +08:00
DecoderEmitterFnTable.td
[LLVM][DecoderEmitter] Add option to use function table in decodeToMCInst (#144814)
2025-06-24 18:49:05 -07:00
def-multiple-operands.td
[TableGen][InstrInfoEmitter] Count sub-operands on def operands
2024-04-16 20:34:20 -04:00
defmclass.td
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DefmInherit.td
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DefmInsideMultiClass.td
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defset-typeerror.td
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defset.td
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deftype.td
[TableGen] Support type aliases via new keyword deftype
2024-02-02 17:41:47 +08:00
defvar.td
[TableGen] Unify the priority of variables
2023-05-24 12:44:14 +08:00
detailed-records.td
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directive1.td
[utils][TableGen] Make some non-bitmask enums iterable (#148647)
2025-07-17 11:27:47 -05:00
directive2.td
[utils][TableGen] Make some non-bitmask enums iterable (#148647)
2025-07-17 11:27:47 -05:00
directive3.td
[utils][TableGen] Implement clause aliases as alternative spellings (#141765)
2025-06-05 12:35:30 -05:00
dump.td
[TableGen] Resolve References at top level (#104578)
2024-08-19 21:05:39 +05:30
duplicate-include.inc
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duplicate-include.td
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DuplicateFieldValues.td
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DuplicateProcessorFeatures.td
[TableGen] Print a warning when a Processor contains duplicate Features / TuneFeatures (#137864)
2025-04-29 16:22:48 -07:00
empty-psets.td
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empty.td
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eq-unset.td
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eq.td
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eqbit.td
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exists-error-non-string.td
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exists-error-record.td
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exists-error-uninitialized.td
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exists.td
[RISCV][llvm-tblgen] Support conditional definitions using !exists clauses
2023-03-03 11:29:47 -08:00
FastISelEmitter.td
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field-access-initializers.td
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FieldAccess.td
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filter.td
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find.td
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foldl.td
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foreach-eval.td
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foreach-leak.td
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foreach-multiclass.td
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foreach-range-parse-errors0.td
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foreach-range-parse-errors1.td
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foreach-range-parse-errors2.td
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foreach-range-parse-errors3.td
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foreach-range-parse-errors4.td
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foreach-range-parse-errors5.td
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foreach-variable-range.td
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foreach.td
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ForeachList.td
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ForeachLoop.td
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ForwardRef.td
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GeneralList.td
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generic-tables-instruction.td
[TableGen][NFC] Factor early-out range check. (#123645)
2025-01-20 19:13:31 -06:00
generic-tables-return-range.td
[TableGen] Add support for emitting new function definition to return a range of results for Primary Key (#96174)
2024-07-11 10:54:31 -07:00
generic-tables.td
[TableGen][NFC] Factor early-out range check. (#123645)
2025-01-20 19:13:31 -06:00
GenTags.td
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get-named-operand-idx.td
[TableGen] Implement getNamedOperandIdx with another table lookup. NFC. (#151116)
2025-07-30 14:03:26 +01:00
get-operand-type-no-expand.td
[TableGen][InstrInfo] Cull mapping that have not been enabled/not needed (#126137)
2025-02-10 08:16:12 -08:00
get-operand-type.td
[TableGen][InstrInfo] Cull mapping that have not been enabled/not needed (#126137)
2025-02-10 08:16:12 -08:00
getsetop.td
[TableGen] Improve handling for dag op names (#149248)
2025-07-29 09:05:17 +02:00
HasNoUse.td
[DAG] Use SDValue for PatFrag checks (#137519)
2025-05-01 08:58:59 +01:00
HwModeBitSet.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeAPInt.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeDecode2.td
[TableGen] Introduce a less aggressive suppression for HwMode Decoder… (#86060)
2024-04-01 17:19:46 +08:00
HwModeEncodeDecode3.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeDecode.td
[TableGen] Fixes for per-HwMode decoding problem (#82201)
2024-02-19 13:14:22 +08:00
HwModeSelect.td
[TableGen] Add assert to validate Objects list for HwModeSelect (#123794)
2025-01-27 13:44:44 -08:00
HwModeSubRegs.td
[Target][RISCV] Add HwMode support to subregister index size/offset. (#86368)
2024-03-27 12:19:28 -07:00
if-empty-list-arg.td
…
if-type.td
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if-unresolved-cast.td
[llvm-tblgen] Support conditional definitions using !casts clauses
2023-03-10 15:50:11 -08:00
if.td
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ifbit.td
…
ifstmt.td
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Include.inc
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Include.td
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inhibit-pset.td
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initialized.td
[llvm][TableGen] Add a !initialized predicate to allow testing for ? (#117964)
2024-12-17 20:34:35 -06:00
instances.td
[TableGen] Add !instances operator to get defined records (#129680)
2025-03-28 16:31:00 +08:00
IntBitInit.td
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interleave.td
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intrinsic-attrs.td
[Intrinsics] Add support for range attributes (#135642)
2025-04-17 11:11:00 +02:00
intrinsic-duplicate-name.td
[LLVM][TableGen] Add error check for duplicate intrinsic names (#109226)
2024-09-19 05:21:00 -07:00
intrinsic-long-name.td
[TableGen] Refactor Intrinsics record (#106986)
2024-09-04 15:04:10 -07:00
intrinsic-overload-conflict.td
[LLVM][TableGen] Refine overloaded intrinsic suffix check (#117957)
2024-12-03 13:33:15 -05:00
intrinsic-prefix-error.td
[TableGen] Add PrintError family overload that take a print function (#107333)
2024-09-07 05:13:54 -07:00
intrinsic-struct.td
[TableGen] Add check for number of intrinsic return values (#107326)
2024-09-05 14:52:30 -07:00
intrinsic-target-prefix-for-target-independent.td
[LLVM][TableGen] Check name conflicts between target dep and independent intrinsics (#109826)
2024-09-25 12:01:17 -07:00
intrinsic-varargs.td
llvm/test/TableGen/intrinsic-*.td: Use Intrinsics.td instead of mock
2023-03-20 06:48:14 +09:00
IntSpecialValues.td
…
invalid-macro-name-command-line.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
invalid-type-cast-patfrags.td
[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)
2024-10-01 11:17:00 +04:00
InvalidMCSchedClassDesc.td
[MC] Use StringTable to reduce dynamic relocations (#144202)
2025-06-25 05:23:11 -07:00
isa-non-primary.td
[tblgen] Fix behavior of !isa to prevent premature folding (#130442)
2025-03-18 20:05:37 -07:00
isa.td
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JSON-check.py
[NFC][Py Reformat] Reformat python files in llvm
2023-05-17 10:48:52 +02:00
JSON-locs.td
[TableGen] Include source location in JSON dump (#79028)
2024-01-24 17:07:20 +00:00
JSON.td
[TableGen] Include source location in JSON dump (#79028)
2024-01-24 17:07:20 +00:00
LazyChange.td
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LetInsideMultiClasses.td
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letUnknownValue.td
[llvm][TableGen] Fix misleading error for invalid use of let (#118616)
2024-12-09 13:21:46 +00:00
lisp.td
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list-element-bitref.td
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ListArgs.td
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ListArgsSimple.td
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listconcat.td
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ListConversion.td
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listflatten-error.td
[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)
2024-09-24 12:24:17 -07:00
listflatten.td
[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)
2024-09-24 12:24:17 -07:00
ListManip.td
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ListOfList.td
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listpaste.td
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listremove.td
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ListSlices-fail.td
TableGen: Let expressions available to list subscriptions and list slices
2023-04-26 23:47:16 +09:00
ListSlices.td
TableGen: Let expressions available to list subscriptions and list slices
2023-04-26 23:47:16 +09:00
listsplat.td
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lit.local.cfg
[AIX] Use internal lit shell for TableGen instead of a global setting (#113627)
2024-10-25 13:06:02 -04:00
LoLoL.td
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MacroFusion.td
[TableGen][MacroFusion] Predicate if the first inst has the same register (#137778)
2025-05-13 19:05:42 +08:00
match.td
[TableGen] Add !match operator to do regex matching (#130759)
2025-03-13 12:13:09 +08:00
math.td
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MissingOperandField.td
[TableGen] Delete support for deprecated positional matching.
2023-03-07 15:04:09 -05:00
MixedCasedMnemonic.td
[TableGen] Minor cleanup in StringToOffsetTable (#147712)
2025-07-09 12:22:29 -07:00
MnemonicAlias.td
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MultiClass-def-fail.td
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MultiClass-defm-fail.td
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MultiClass-defm.td
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MultiClass.td
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MultiClassDefName.td
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MultiClassInherit.td
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MultiPat.td
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multiple-type-casts-patfrags.td
[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)
2024-10-01 11:17:00 +04:00
name-resolution-consistency.td
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named-arguments.td
[TableGen] Support named arguments
2023-07-20 16:03:17 +08:00
nested_ifdef2.inc
[TableGen] Fix incorrect handling of nested #ifndef directives
2023-09-07 12:42:22 -07:00
nested_ifdef_main.td
[TableGen] Fix incorrect handling of nested #ifndef directives
2023-09-07 12:42:22 -07:00
nested_ifdef.inc
[TableGen] Fix incorrect handling of nested #ifndef directives
2023-09-07 12:42:22 -07:00
nested-comment.td
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NestedForeach.td
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nul-char.td
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paste-reserved.td
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Paste.td
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PerWriteCycleCount.td
[TableGen] Add support for per-write cycle tunables (#125870)
2025-02-17 11:32:47 +00:00
pr8330.td
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predicate-patfags.td
[TableGen] Directly use SDNode functions to implement HasOneUse and HasNoUse. NFC (#133976)
2025-04-01 22:14:17 -07:00
prep-diag1.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag2.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag3.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag4.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag5.td
…
prep-diag6.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag7.td
…
prep-diag8.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag9.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag10.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag11-include.inc
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prep-diag11.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag12-include.inc
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prep-diag12.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag13.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag14.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef-diag-1.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef-diag-2.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef.td
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prep-region-include.inc
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prep-region-processing.td
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ProcessorUniqueNames.td
[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)
2024-08-08 02:00:36 +03:00
pset-enum.td
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pseudo-inst-expansion.td
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range-lists.td
…
range-op-fail.td
[TableGen] Enhance !range bang operator (#66489)
2023-09-27 12:07:36 +08:00
range-op.td
[TableGen] Enhance !range bang operator (#66489)
2023-09-27 12:07:36 +08:00
rc-weight-override.td
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ReadAdvanceInvalidWrite.td
[CodeGenSchedule] Don't allow invalid ReadAdvances to be formed (#82685)
2024-02-26 18:25:21 -08:00
RegBankFromRegClass.td
[GISel][TableGen] Generate getRegBankFromRegClass (#99896)
2024-07-25 09:41:55 -04:00
RegisterBankEmitter.td
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RegisterClass.td
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RegisterEncoder.td
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RegisterInfoEmitter-BaseClassOrder.td
[TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.
2023-07-27 10:42:21 +01:00
RegisterInfoEmitter-inherit-properties.td
[TableGen] Inherit properties from the nearest allocatable superclass. (#127018)
2025-03-25 15:54:06 -05:00
RegisterInfoEmitter-regcost-list.td
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RegisterInfoEmitter-regcost-tuple.td
TableGen: Let getAllDerivedDefinitions() numeric order.
2023-03-31 06:00:54 +09:00
RegisterInfoEmitter-regcost.td
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RegisterInfoEmitter-tsflags.td
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RelTest.td
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repr.td
[TableGen] New bang operator !repr. (#68716)
2023-10-11 13:11:48 +02:00
riscv-target-def.td
[RISCV] Add mvendorid/marchid/mimpid to CPU definitions (#116202)
2024-11-22 22:58:54 +08:00
RuntimeLibcallEmitter-bad-system-library-entry-error.td
TableGen: Allow defining sets of runtime libraries (#144978)
2025-07-08 10:17:45 +09:00
RuntimeLibcallEmitter-calling-conv.td
ARM: Start moving runtime libcalls into tablegen (#146084)
2025-07-10 19:38:31 +09:00
RuntimeLibcallEmitter-conflict-warning.td
TableGen: Allow defining sets of runtime libraries (#144978)
2025-07-08 10:17:45 +09:00
RuntimeLibcallEmitter-nested-predicates-error.td
TableGen: Allow defining sets of runtime libraries (#144978)
2025-07-08 10:17:45 +09:00
RuntimeLibcallEmitter.td
TableGen: Sort RuntimeLibcallImpls secondarily by enum names (#150728)
2025-07-26 11:22:59 +09:00
SchedModelError.td
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searchabletables-intrinsic.td
[TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (#107339)
2024-09-07 15:11:34 -07:00
self-reference-recursion.td
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self-reference-typeerror.td
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self-reference.td
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SetTheory.td
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SiblingForeach.td
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simplify-patfrag.td
[TableGen] ShouldIgnore Pattern bit to disable DAG pattern imports during GISel (#88382)
2024-04-25 16:42:48 -04:00
size.td
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Slice.td
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spurious-semi.td
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strconcat.td
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string_ops.td
[TableGen] add !toupper and !tolower operators to change the casing of strings.
2023-03-07 12:41:56 +00:00
String.td
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SubRegsAndAliases.td
[TableGen][CodeGen] Give every leaf register a unique regunit (#139526)
2025-05-13 10:52:36 +01:00
subst2.td
…
subst.td
…
substr.td
…
SubtargetFeatureUniqueNames.td
[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)
2024-08-08 02:00:36 +03:00
SuperSubclassSameName.td
…
TargetInstrInfo.td
…
TargetInstrSpec.td
…
template-arg-dependency.td
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template-args.td
[TableGen] Do not exit in template argument check (#121636)
2025-01-06 21:06:17 +01:00
TemplateArgRename.td
…
Tree.td
…
TreeNames.td
…
true-false.td
[TableGen] Avoid evaluating RHS of a BinOp until short-circuit is complete (#144021)
2025-06-13 10:36:09 -07:00
trydecode-emission2.td
[NFC][TableGen] Print DecodeIdx for DecodeOps in DecoderEmitter (#142963)
2025-06-05 21:57:26 -07:00
trydecode-emission3.td
[NFC][TableGen] Print DecodeIdx for DecodeOps in DecoderEmitter (#142963)
2025-06-05 21:57:26 -07:00
trydecode-emission4.td
[NFC][TableGen] Print DecodeIdx for DecodeOps in DecoderEmitter (#142963)
2025-06-05 21:57:26 -07:00
trydecode-emission.td
[NFC][TableGen] Print DecodeIdx for DecodeOps in DecoderEmitter (#142963)
2025-06-05 21:57:26 -07:00
TwoLevelName.td
…
UnsetBitInit.td
…
unsetop.td
[TableGen] Improve handling for dag op names (#149248)
2025-07-29 09:05:17 +02:00
unterminated-c-comment-include.inc
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unterminated-c-comment.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
unterminated-code-block-include.inc
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unterminated-code-block.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
UnterminatedComment.td
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usevalname.td
[TableGen] Add missing $ before the dag operator name (#140969)
2025-05-22 16:21:19 -07:00
ValidIdentifiers.td
…
VarLenDecoder.td
[LLVM][MC] Introduce OrFail variants of MCD ops (#138614)
2025-06-05 06:17:50 -07:00
VarLenEncoder.td
[NFC][TableGen] Create valid Dag in VarLenCodeEmitter (#140283)
2025-05-19 12:27:18 -07:00
VarLenEncoderHwModes.td
[Tablegen] Bugfix and refactor VarLenCodeEmitter HwModes. (#68795)
2023-10-20 07:21:24 +02:00
warn-unused-template-arg.td
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x86-fold-tables.inc
[X86][NFC] Add missing immediate qualifier to VSM3RNDS2 instruction (#131576)
2025-03-17 17:59:39 +08:00
x86-fold-tables.td
[TableGen] Handle Windows line endings in x86-fold-tables.td test (#112997)
2024-10-21 09:58:59 -07:00
x86-instr-mapping.inc
[X86][NF] Switch the order of Inst and &Target.getInstruction(NewRec) (#130739)
2025-03-12 17:35:54 +08:00
x86-instr-mapping.td
Test added for x86-instr-mapping (#115170)
2024-11-07 19:09:21 +08:00