llvm-project

AArch64

[SLP]Check if the copyable element is a sub instruciton with abs in isCommutable

2025-11-14 16:09:50 -08:00

AMDGPU

[SLP] Invariant loads cannot have a memory dependency on stores. (#167929 )

2025-11-18 09:35:29 +01:00

ARM

[SLP]Check the MainOp matches the requirements for the instructions

2025-01-28 06:00:52 -08:00

NVPTX

[test][Transforms] Remove unsafe-fp-math uses part 3 (NFC) (#164787 )

2025-10-24 18:49:45 +08:00

PowerPC

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RISCV

[IR] Replace alignment argument with attribute on masked intrinsics (#163802 )

2025-10-20 08:50:09 +00:00

SystemZ

[llvm] Regenerate test checks including TBAA semantics (NFC)

2025-09-12 20:01:17 +02:00

VE

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WebAssembly

[SLP] Avoid -passes=instcombine stages in SLP tests (#146257 )

2025-07-02 06:14:41 -04:00

X86

[SLP]Do not consider split nodes, when checking parent PHI-based nodes

2025-11-16 12:39:58 -08:00

XCore

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abs-overflow-incorrect-minbws.ll

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addsub.ll

[SLP]Reduce number of alternate instruction, where possible

2025-03-12 08:18:51 -07:00

alt-cmp-vectorize.ll

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alternate-cmp-swapped-pred-parent.ll

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alternate-non-profitable.ll

[SLP]Initial support for copyable elements (non-schedulable only)

2025-07-25 10:55:07 -07:00

alternate-opcode-sindle-bv.ll

[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526 )

2025-07-15 15:19:27 +01:00

arith-div-undef.ll

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bbi-106161.ll

[SLP] Make getSameOpcode support interchangeable instructions. (#135797 )

2025-04-16 00:08:59 +08:00

bool-logical-op-reduction-with-poison.ll

[SLP]Enable Shl as a base opcode in copyables (#156766 )

2025-10-06 07:07:37 -04:00

buildvector-insert-mask-size.ll

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buildvector-nodes-dependency.ll

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call-arg-reduced-by-minbitwidth.ll

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catchswitch.ll

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consecutive-access.ll

[test][Transforms] Remove unsafe-fp-math uses part 3 (NFC) (#164787 )

2025-10-24 18:49:45 +08:00

const-bool-logical-or-reduction.ll

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crash_exceed_scheduling.ll

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crash_extractelement_poison.ll

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diamond_broadcast.ll

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empty-struct.ll

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ext-after-phi-node.ll

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ext-int-reduced-not-operand.ll

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extended-vectorized-gathered-inst.ll

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external-user-instruction-minbitwidth.ll

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extract_with_non_const_index.ll

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extract-many-users-buildvector.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

extract-vectorized-operand.ll

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extractelement-insertpoint.ll

[llvm][test] Fix REQUIRES in extractelement-insertpoint.ll

2025-07-03 13:14:42 +00:00

extractlements-gathered-first-node.ll

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extracts-with-undefs.ll

[SLP]Initial FMAD support (#149102 )

2025-08-11 05:53:55 -07:00

fix-113880.ll

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freeze-signedness-missed.ll

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full-overlap-non-schedulable.ll

[SLPVectorizer] Move X86 specific handling into X86TTIImpl. (#137830 )

2025-04-30 17:11:27 +02:00

gather_extract_from_vectorbuild.ll

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gathered-consecutive-loads-different-types.ll

[SLP]Initial support for copyable elements

2025-08-11 09:41:19 -04:00

gep-with-extractelement-many-users.ll

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insert-crash-index.ll

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insert-element-build-vector-const.ll

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insert-element-build-vector-inseltpoison.ll

[test][Transforms] Remove unsafe-fp-math uses part 3 (NFC) (#164787 )

2025-10-24 18:49:45 +08:00

insert-element-build-vector.ll

[test][Transforms] Remove unsafe-fp-math uses part 3 (NFC) (#164787 )

2025-10-24 18:49:45 +08:00

insert-element-multiple-uses.ll

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insert-shuffle.ll

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insertelement-across-zero.ll

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insertelement-postpone.ll

[AArch64] Change the cost of fma and fmuladd to match fmul. (#152963 )

2025-08-14 21:53:45 +01:00

insertelement-uses-vectorized-index.ll

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InstructionsState-is-invalid-2.ll

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int_sideeffect.ll

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int-bitcast-minbitwidth.ll

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is_fpclass.ll

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isCommutative.ll

[SLP] Fix isCommutative to check uses of the original instruction instead of the converted instruction. (#143094 )

2025-06-17 22:03:14 +08:00

isOpcodeOrAlt.ll

[SLP] Make getSameOpcode support interchangeable instructions. (#135797 )

2025-04-16 00:08:59 +08:00

jumbled_store_crash.ll

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limit.ll

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logical-ops-poisonous-repeated.ll

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materialize-vector-of-consts.ll

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minbitwidth-multiuse-with-insertelement.ll

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minbitwidth-node-with-multi-users.ll

[SLP]Enable support for logical ops in copyables (#162945 )

2025-10-13 08:01:32 -04:00

minbitwidth-user-not-min.ll

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multi-node-vectorized-insts.ll

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multi-uses-with-deps-in-first.ll

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one-element-vector.ll

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operand-is-reduced-val.ll

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orig-btiwidth-les-projected.ll

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partial-register-extract.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

peek-through-shuffle.ll

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phi-not-ordered.ll

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phi-undef-input.ll

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postponed_gathers.ll

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pr31599-inseltpoison.ll

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pr31599.ll

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rdar128092379.ll

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reduced-gathered-vectorized.ll

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reduction_loads.ll

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reduction-gather-non-scheduled-extracts.ll

[SLP]Use TTI::getScalarizationOverhead where possible

2025-02-04 18:49:43 -05:00

reduction-min-select.ll

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reduction-modified-values.ll

[SLP]Improved reduction cost/codegen

2025-02-14 11:03:33 -08:00

reduction-whole-regs-loads.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

reductions.ll

[LV] Create in-loop sub reductions (#147026 )

2025-08-12 10:22:41 +01:00

reorder-clustered-node.ll

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reorder-node.ll

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reordered-top-scalars.ll

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reordering-single-phi.ll

[SLP]Model single unique value insert + shuffle as splat + select, where profitable

2025-04-22 11:30:29 -04:00

reschedule.ll

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resized-alt-shuffle-after-minbw.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

return.ll

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reudction-or-non-poisoned.ll

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reused-buildvector-matching-vectorized-node.ll

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reused-scalar-in-multi-node.ll

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revec-fix-109835.ll

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revec-insertelement.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

revec-reduction-logical.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

revec-shufflevector.ll

[SLP]Remove emission of vector_insert/vector_extract intrinsics

2025-07-11 15:26:45 -04:00

revec.ll

[SLP]Initial support for copyable elements

2025-08-11 09:41:19 -04:00

root-trunc-extract-reuse.ll

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same-scalar-in-same-phi-extract.ll

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same-scalars-reordered-in-reduction.ll

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scalarazied-result.ll

[AArch64] Add better fcmp costs for expanded predicates (#147940 )

2025-08-04 13:42:57 +01:00

scalarization-overhead.ll

[SLP]Improved reduction cost/codegen

2025-02-14 11:03:33 -08:00

several_store_chains.ll

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shrink_after_reorder2.ll

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shuffle-mask-resized.ll

[SLP] Make getSameOpcode support interchangeable instructions. (#135797 )

2025-04-16 00:08:59 +08:00

shuffle-multivector.ll

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shufflebuilder-bug.ll

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slp-deleted-inst.ll

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slp-hr-with-reuse.ll

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slp-max-phi-size.ll

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slp-max-reg-size.ll

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slp-non-pow-2-insertelement.ll

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slp-umax-rdx-matcher-crash.ll

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slp-variable-insertelement.ll

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splat-buildvector.ll

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stores-non-ordered.ll

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unknown-entries.ll

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vectorizable-functions-inseltpoison.ll

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vectorizable-functions.ll

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vectorize-reorder-alt-shuffle.ll

[SLP]Improve reordering of the alternate nodes

2025-04-24 14:33:10 -04:00

vectorize-reordered-list.ll

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zext-incoming-for-neg-icmp.ll

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