59cb55d384
VPTypeAnalysis::inferScalarTypeForRecipe is missing the case for VPInstruction::LogicalAnd, due to which the test vplan-incomplete-cases.ll crashes. Add this missing case, and move the test in vplan-infer-not-or-type.ll to vplan-incomplete-cases.ll, showing correct codegen for trip-counts 2 and 3.
119 lines
5.3 KiB
LLVM
119 lines
5.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -passes=loop-vectorize -S %s | FileCheck %s
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; This test used to crash due to missing Or/Not cases in inferScalarTypeForRecipe.
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define void @vplan_incomplete_cases_tc2(i8 %x, i8 %y) {
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; CHECK-LABEL: define void @vplan_incomplete_cases_tc2(
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; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
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; CHECK-NEXT: br i1 true, label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i8 [ 2, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i8 [ [[IV_NEXT:%.*]], %[[LATCH:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], [[Y]]
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; CHECK-NEXT: [[EXTRACT_T:%.*]] = trunc i8 [[AND]] to i1
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; CHECK-NEXT: br i1 [[EXTRACT_T]], label %[[LATCH]], label %[[INDIRECT_LATCH:.*]]
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; CHECK: [[INDIRECT_LATCH]]:
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; CHECK-NEXT: br label %[[LATCH]]
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; CHECK: [[LATCH]]:
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; CHECK-NEXT: [[IV_NEXT]] = add i8 [[IV]], 1
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[IV]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ZEXT]], 1
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; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP3:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop.header
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loop.header: ; preds = %latch, %entry
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%iv = phi i8 [ %iv.next, %latch ], [ 0, %entry ]
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%and = and i8 %x, %y
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%extract.t = trunc i8 %and to i1
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br i1 %extract.t, label %latch, label %indirect.latch
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indirect.latch: ; preds = %loop.header
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br label %latch
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latch: ; preds = %indirect.latch, loop.header
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%iv.next = add i8 %iv, 1
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%zext = zext i8 %iv to i32
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%cmp = icmp ult i32 %zext, 1
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br i1 %cmp, label %loop.header, label %exit
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exit: ; preds = %latch
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ret void
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}
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; This test used to crash due to missing the LogicalAnd case in inferScalarTypeForRecipe.
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define void @vplan_incomplete_cases_tc3(i8 %x, i8 %y) {
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; CHECK-LABEL: define void @vplan_incomplete_cases_tc3(
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; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 4
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; CHECK-NEXT: br i1 true, label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i8 [ 4, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i8 [ [[IV_NEXT:%.*]], %[[LATCH:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], [[Y]]
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; CHECK-NEXT: [[EXTRACT_T:%.*]] = trunc i8 [[AND]] to i1
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; CHECK-NEXT: br i1 [[EXTRACT_T]], label %[[LATCH]], label %[[INDIRECT_LATCH:.*]]
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; CHECK: [[INDIRECT_LATCH]]:
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; CHECK-NEXT: br label %[[LATCH]]
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; CHECK: [[LATCH]]:
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; CHECK-NEXT: [[IV_NEXT]] = add i8 [[IV]], 1
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[IV]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ZEXT]], 2
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; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP5:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop.header
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loop.header: ; preds = %latch, %entry
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%iv = phi i8 [ %iv.next, %latch ], [ 0, %entry ]
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%and = and i8 %x, %y
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%extract.t = trunc i8 %and to i1
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br i1 %extract.t, label %latch, label %indirect.latch
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indirect.latch: ; preds = %loop.header
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br label %latch
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latch: ; preds = %indirect.latch, loop.header
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%iv.next = add i8 %iv, 1
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%zext = zext i8 %iv to i32
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%cmp = icmp ult i32 %zext, 2
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br i1 %cmp, label %loop.header, label %exit
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exit: ; preds = %latch
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ret void
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}
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;.
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; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
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; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
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; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
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; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
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; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
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; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]}
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;.
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