94503c7bc3
Summary: This change extends MachineCopyPropagation to do COPY source forwarding and adds an additional run of the pass to the default pass pipeline just after register allocation. This version of this patch uses the newly added MachineOperand::isRenamable bit to avoid forwarding registers is such a way as to violate constraints that aren't captured in the Machine IR (e.g. ABI or ISA constraints). This change is a continuation of the work started in D30751. Reviewers: qcolombet, javed.absar, MatzeB, jonpa, tstellar Subscribers: tpr, mgorny, mcrosier, nhaehnle, nemanjai, jyknight, hfinkel, arsenm, inouehrs, eraman, sdardis, guyblank, fedor.sergeev, aheejin, dschuff, jfb, myatsina, llvm-commits Differential Revision: https://reviews.llvm.org/D41835 llvm-svn: 323991
39 lines
1.0 KiB
LLVM
39 lines
1.0 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 -verify-machineinstrs -o - %s | FileCheck %s
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; LLVM should be able to cope with multiple uses of the same flag-setting
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; instruction at different points of a routine. Either by rematerializing the
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; compare or by saving and restoring the flag register.
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declare void @bar()
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@var = global i32 0
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define i32 @test_multiflag(i32 %n, i32 %m, i32 %o) {
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; CHECK-LABEL: test_multiflag:
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%test = icmp ne i32 %n, %m
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; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
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%val = zext i1 %test to i32
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; CHECK: cset {{[xw][0-9]+}}, ne
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; CHECK: mov [[RHSCOPY:w[0-9]+]], [[RHS]]
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; CHECK: mov [[LHSCOPY:w[0-9]+]], [[LHS]]
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store i32 %val, i32* @var
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call void @bar()
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; CHECK: bl bar
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; Currently, the comparison is emitted again. An MSR/MRS pair would also be
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; acceptable, but assuming the call preserves NZCV is not.
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br i1 %test, label %iftrue, label %iffalse
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; CHECK: cmp [[LHSCOPY]], [[RHSCOPY]]
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; CHECK: b.eq
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iftrue:
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ret i32 42
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iffalse:
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ret i32 0
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}
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