
Closes https://github.com/llvm/llvm-project/issues/99116 Implements `firstbitlow` by extracting common functionality from `firstbithigh` into a shared function while also fixing a bug for an edge case where `u64x3` and larger vectors will attempt to create vectors larger than the SPRIV max of 4. --------- Co-authored-by: Steven Perron <stevenperron@google.com>
54 lines
1.5 KiB
C++
54 lines
1.5 KiB
C++
//===- DirectXTargetTransformInfo.cpp - DirectX TTI ---------------*- C++
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//-*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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//===----------------------------------------------------------------------===//
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#include "DirectXTargetTransformInfo.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/IntrinsicsDirectX.h"
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using namespace llvm;
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bool DirectXTTIImpl::isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID,
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unsigned ScalarOpdIdx) {
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switch (ID) {
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case Intrinsic::dx_wave_readlane:
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return ScalarOpdIdx == 1;
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default:
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return false;
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}
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}
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bool DirectXTTIImpl::isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID,
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int OpdIdx) {
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switch (ID) {
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case Intrinsic::dx_asdouble:
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return OpdIdx == 0;
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default:
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return OpdIdx == -1;
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}
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}
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bool DirectXTTIImpl::isTargetIntrinsicTriviallyScalarizable(
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Intrinsic::ID ID) const {
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switch (ID) {
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case Intrinsic::dx_frac:
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case Intrinsic::dx_rsqrt:
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case Intrinsic::dx_wave_readlane:
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case Intrinsic::dx_asdouble:
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case Intrinsic::dx_splitdouble:
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case Intrinsic::dx_firstbituhigh:
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case Intrinsic::dx_firstbitshigh:
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case Intrinsic::dx_firstbitlow:
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return true;
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default:
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return false;
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}
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}
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