69e75ae695
This fixes what I consider to be an API flaw I've tripped over multiple times. The point this is constructed isn't well defined, so depending on where this is first called, you can conclude different information based on the MachineFunction. For example, the AMDGPU implementation inspected the MachineFrameInfo on construction for the stack objects and if the frame has calls. This kind of worked in SelectionDAG which visited all allocas up front, but broke in GlobalISel which hasn't visited any of the IR when arguments are lowered. I've run into similar problems before with the MIR parser and trying to make use of other MachineFunction fields, so I think it's best to just categorically disallow dependency on the MachineFunction state in the constructor and to always construct this at the same time as the MachineFunction itself. A missing feature I still could use is a way to access an custom analysis pass on the IR here.
79 lines
2.9 KiB
C++
79 lines
2.9 KiB
C++
//===-- ARMMachineFunctionInfo.cpp - ARM machine function info ------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "ARMMachineFunctionInfo.h"
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#include "ARMSubtarget.h"
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using namespace llvm;
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void ARMFunctionInfo::anchor() {}
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static bool GetBranchTargetEnforcement(const Function &F,
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const ARMSubtarget *Subtarget) {
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if (!Subtarget->isMClass() || !Subtarget->hasV7Ops())
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return false;
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if (!F.hasFnAttribute("branch-target-enforcement")) {
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if (const auto *BTE = mdconst::extract_or_null<ConstantInt>(
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F.getParent()->getModuleFlag("branch-target-enforcement")))
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return BTE->getZExtValue();
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return false;
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}
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const StringRef BTIEnable =
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F.getFnAttribute("branch-target-enforcement").getValueAsString();
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assert(BTIEnable.equals_insensitive("true") ||
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BTIEnable.equals_insensitive("false"));
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return BTIEnable.equals_insensitive("true");
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}
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// The pair returns values for the ARMFunctionInfo members
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// SignReturnAddress and SignReturnAddressAll respectively.
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static std::pair<bool, bool> GetSignReturnAddress(const Function &F) {
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if (!F.hasFnAttribute("sign-return-address")) {
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const Module &M = *F.getParent();
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if (const auto *Sign = mdconst::extract_or_null<ConstantInt>(
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M.getModuleFlag("sign-return-address"))) {
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if (Sign->getZExtValue()) {
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if (const auto *All = mdconst::extract_or_null<ConstantInt>(
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M.getModuleFlag("sign-return-address-all")))
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return {true, All->getZExtValue()};
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return {true, false};
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}
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}
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return {false, false};
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}
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StringRef Scope = F.getFnAttribute("sign-return-address").getValueAsString();
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if (Scope.equals("none"))
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return {false, false};
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if (Scope.equals("all"))
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return {true, true};
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assert(Scope.equals("non-leaf"));
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return {true, false};
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}
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ARMFunctionInfo::ARMFunctionInfo(const Function &F,
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const ARMSubtarget *Subtarget)
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: isThumb(Subtarget->isThumb()), hasThumb2(Subtarget->hasThumb2()),
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IsCmseNSEntry(F.hasFnAttribute("cmse_nonsecure_entry")),
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IsCmseNSCall(F.hasFnAttribute("cmse_nonsecure_call")),
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BranchTargetEnforcement(GetBranchTargetEnforcement(F, Subtarget)) {
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if (Subtarget->isMClass() && Subtarget->hasV7Ops())
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std::tie(SignReturnAddress, SignReturnAddressAll) = GetSignReturnAddress(F);
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}
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MachineFunctionInfo *
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ARMFunctionInfo::clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF,
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const DenseMap<MachineBasicBlock *, MachineBasicBlock *>
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&Src2DstMBB) const {
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return DestMF.cloneInfo<ARMFunctionInfo>(*this);
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}
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