
D25618 added a method to verify the instruction predicates for an emitted instruction, through verifyInstructionPredicates added into <Target>MCCodeEmitter::encodeInstruction. This is a very useful idea, but the implementation inside MCCodeEmitter made it only fire for object files, not assembly which most of the llvm test suite uses. This patch moves the code into the <Target>_MC::verifyInstructionPredicates method, inside the InstrInfo. The allows it to be called from other places, such as in this patch where it is called from the <Target>AsmPrinter::emitInstruction methods which should trigger for both assembly and object files. It can also be called from other places such as verifyInstruction, but that is not done here (it tends to catch errors earlier, but in reality just shows all the mir tests that have incorrect feature predicates). The interface was also simplified slightly, moving computeAvailableFeatures into the function so that it does not need to be called externally. The ARM, AMDGPU (but not R600), AVR, Mips and X86 backends all currently show errors in the test-suite, so have been disabled with FIXME comments. Recommitted with some fixes for the leftover MCII variables in release builds. Differential Revision: https://reviews.llvm.org/D129506
175 lines
6.2 KiB
C++
175 lines
6.2 KiB
C++
//===-- CSKYMCTargetDesc.cpp - CSKY Target Descriptions -------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// This file provides CSKY specific target descriptions.
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///
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//===----------------------------------------------------------------------===//
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#include "CSKYMCTargetDesc.h"
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#include "CSKYAsmBackend.h"
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#include "CSKYELFStreamer.h"
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#include "CSKYInstPrinter.h"
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#include "CSKYMCAsmInfo.h"
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#include "CSKYMCCodeEmitter.h"
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#include "CSKYTargetStreamer.h"
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#include "TargetInfo/CSKYTargetInfo.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCInstrAnalysis.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/TargetRegistry.h"
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#define GET_INSTRINFO_MC_DESC
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#define ENABLE_INSTR_PREDICATE_VERIFIER
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#include "CSKYGenInstrInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "CSKYGenRegisterInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "CSKYGenSubtargetInfo.inc"
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using namespace llvm;
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static MCAsmInfo *createCSKYMCAsmInfo(const MCRegisterInfo &MRI,
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const Triple &TT,
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const MCTargetOptions &Options) {
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MCAsmInfo *MAI = new CSKYMCAsmInfo(TT);
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// Initial state of the frame pointer is SP.
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unsigned Reg = MRI.getDwarfRegNum(CSKY::R14, true);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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static MCInstrInfo *createCSKYMCInstrInfo() {
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MCInstrInfo *Info = new MCInstrInfo();
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InitCSKYMCInstrInfo(Info);
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return Info;
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}
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static MCInstPrinter *createCSKYMCInstPrinter(const Triple &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI) {
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return new CSKYInstPrinter(MAI, MII, MRI);
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}
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static MCRegisterInfo *createCSKYMCRegisterInfo(const Triple &TT) {
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MCRegisterInfo *Info = new MCRegisterInfo();
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InitCSKYMCRegisterInfo(Info, CSKY::R15);
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return Info;
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}
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static MCSubtargetInfo *createCSKYMCSubtargetInfo(const Triple &TT,
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StringRef CPU, StringRef FS) {
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std::string CPUName = std::string(CPU);
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if (CPUName.empty())
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CPUName = "generic";
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return createCSKYMCSubtargetInfoImpl(TT, CPUName, /*TuneCPU=*/CPUName, FS);
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}
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static MCTargetStreamer *
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createCSKYObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
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const Triple &TT = STI.getTargetTriple();
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if (TT.isOSBinFormatELF())
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return new CSKYTargetELFStreamer(S, STI);
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return nullptr;
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}
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static MCStreamer *createELFStreamer(const Triple &T, MCContext &Ctx,
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std::unique_ptr<MCAsmBackend> &&MAB,
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std::unique_ptr<MCObjectWriter> &&OW,
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std::unique_ptr<MCCodeEmitter> &&Emitter,
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bool RelaxAll) {
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CSKYELFStreamer *S = new CSKYELFStreamer(Ctx, std::move(MAB), std::move(OW),
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std::move(Emitter));
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if (RelaxAll)
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S->getAssembler().setRelaxAll(true);
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return S;
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}
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static MCTargetStreamer *createCSKYAsmTargetStreamer(MCStreamer &S,
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formatted_raw_ostream &OS,
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MCInstPrinter *InstPrinter,
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bool isVerboseAsm) {
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return new CSKYTargetAsmStreamer(S, OS);
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}
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static MCTargetStreamer *createCSKYNullTargetStreamer(MCStreamer &S) {
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return new CSKYTargetStreamer(S);
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}
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namespace {
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class CSKYMCInstrAnalysis : public MCInstrAnalysis {
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public:
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explicit CSKYMCInstrAnalysis(const MCInstrInfo *Info)
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: MCInstrAnalysis(Info) {}
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bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
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uint64_t &Target) const override {
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if (isConditionalBranch(Inst) || isUnconditionalBranch(Inst)) {
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int64_t Imm;
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Imm = Inst.getOperand(Inst.getNumOperands() - 1).getImm();
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Target = Addr + Imm;
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return true;
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}
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if (Inst.getOpcode() == CSKY::BSR32) {
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Target = Addr + Inst.getOperand(0).getImm();
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return true;
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}
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switch (Inst.getOpcode()) {
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default:
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return false;
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case CSKY::LRW16:
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case CSKY::LRW32:
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case CSKY::JSRI32:
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case CSKY::JMPI32:
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int64_t Imm = Inst.getOperand(Inst.getNumOperands() - 1).getImm();
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Target = ((Addr + Imm) & 0xFFFFFFFC);
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return true;
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}
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return false;
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}
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};
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} // end anonymous namespace
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static MCInstrAnalysis *createCSKYInstrAnalysis(const MCInstrInfo *Info) {
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return new CSKYMCInstrAnalysis(Info);
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}
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeCSKYTargetMC() {
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auto &CSKYTarget = getTheCSKYTarget();
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TargetRegistry::RegisterMCAsmBackend(CSKYTarget, createCSKYAsmBackend);
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TargetRegistry::RegisterMCAsmInfo(CSKYTarget, createCSKYMCAsmInfo);
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TargetRegistry::RegisterMCInstrInfo(CSKYTarget, createCSKYMCInstrInfo);
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TargetRegistry::RegisterMCRegInfo(CSKYTarget, createCSKYMCRegisterInfo);
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TargetRegistry::RegisterMCCodeEmitter(CSKYTarget, createCSKYMCCodeEmitter);
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TargetRegistry::RegisterMCInstPrinter(CSKYTarget, createCSKYMCInstPrinter);
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TargetRegistry::RegisterMCSubtargetInfo(CSKYTarget,
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createCSKYMCSubtargetInfo);
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TargetRegistry::RegisterELFStreamer(CSKYTarget, createELFStreamer);
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TargetRegistry::RegisterObjectTargetStreamer(CSKYTarget,
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createCSKYObjectTargetStreamer);
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TargetRegistry::RegisterAsmTargetStreamer(CSKYTarget,
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createCSKYAsmTargetStreamer);
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// Register the null target streamer.
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TargetRegistry::RegisterNullTargetStreamer(CSKYTarget,
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createCSKYNullTargetStreamer);
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TargetRegistry::RegisterMCInstrAnalysis(CSKYTarget, createCSKYInstrAnalysis);
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}
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