cc3bb85580
The Pre-RA VLIWMachineScheduler used by Hexagon is a relatively generic implementation that would make sense to use on other VLIW targets. This commit lifts those classes into their own header/source file with the root VLIWMachineScheduler. I chose this path rather than adding the strategy et al. into MachineScheduler to avoid bloating the file with other implementations. Target-specific behaviors have been captured and replicated through function overloads. - Added an overloadable DFAPacketizer creation member function. This is mainly done for our downstream, which has the capability to override the DFAPacketizer with custom implementations. This is an upstreamable TODO on our end. Currently, it always returns the result of TargetInstrInfo::CreateTargetScheduleState - Added an extra helper which returns the number of instructions in the current packet. This is used in our downstream, and may be useful elsewhere. - Placed the priority heuristic values into the ConvergingVLIWscheduler class instead of defining them as local statics in the implementation - Added a overridable helper in ConvergingVLIWScheduler so that targets can create their own VLIWResourceModel Differential Revision: https://reviews.llvm.org/D113150
43 lines
1.4 KiB
C++
43 lines
1.4 KiB
C++
//===- HexagonMachineScheduler.h - Custom Hexagon MI scheduler --*- C++ -*-===//
|
|
//
|
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
|
// See https://llvm.org/LICENSE.txt for license information.
|
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// Custom Hexagon MI scheduler.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINESCHEDULER_H
|
|
#define LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINESCHEDULER_H
|
|
|
|
#include "llvm/CodeGen/MachineScheduler.h"
|
|
#include "llvm/CodeGen/RegisterPressure.h"
|
|
#include "llvm/CodeGen/TargetSubtargetInfo.h"
|
|
#include "llvm/CodeGen/VLIWMachineScheduler.h"
|
|
|
|
namespace llvm {
|
|
|
|
class SUnit;
|
|
|
|
class HexagonVLIWResourceModel : public VLIWResourceModel {
|
|
public:
|
|
using VLIWResourceModel::VLIWResourceModel;
|
|
bool hasDependence(const SUnit *SUd, const SUnit *SUu) override;
|
|
};
|
|
|
|
class HexagonConvergingVLIWScheduler : public ConvergingVLIWScheduler {
|
|
protected:
|
|
VLIWResourceModel *
|
|
createVLIWResourceModel(const TargetSubtargetInfo &STI,
|
|
const TargetSchedModel *SchedModel) const override;
|
|
int SchedulingCost(ReadyQueue &Q, SUnit *SU, SchedCandidate &Candidate,
|
|
RegPressureDelta &Delta, bool verbose) override;
|
|
};
|
|
|
|
} // end namespace llvm
|
|
|
|
#endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINESCHEDULER_H
|