273a0c8bc9
AMDGPU is unusual in that the both stack is indexed in the same direction as stack growth (up). We therefore always need the emergency stack slots placed as low as possible to ensure they are in range of load/store instruction immediate offsets. The existing logic is mostly OK, but failed if we required stack realignment. I don't understand what the existing control isFPCloseToIncomingSP is supposed to mean, but can only be used to stop placing the scavenge slots earlier. Make this explicit so that targets can opt-in rather than opt-out only.
62 lines
1.8 KiB
C++
62 lines
1.8 KiB
C++
//===-- MipsFrameLowering.h - Define frame lowering for Mips ----*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSFRAMELOWERING_H
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#define LLVM_LIB_TARGET_MIPS_MIPSFRAMELOWERING_H
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#include "Mips.h"
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#include "llvm/CodeGen/TargetFrameLowering.h"
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namespace llvm {
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class MipsSubtarget;
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class MipsFrameLowering : public TargetFrameLowering {
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protected:
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const MipsSubtarget &STI;
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public:
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explicit MipsFrameLowering(const MipsSubtarget &sti, Align Alignment)
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: TargetFrameLowering(StackGrowsDown, Alignment, 0, Alignment), STI(sti) {
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}
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static const MipsFrameLowering *create(const MipsSubtarget &ST);
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bool hasFP(const MachineFunction &MF) const override;
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bool hasBP(const MachineFunction &MF) const;
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bool allocateScavengingFrameIndexesNearIncomingSP(
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const MachineFunction &MF) const override {
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return false;
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}
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bool enableShrinkWrapping(const MachineFunction &MF) const override {
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return true;
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}
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MachineBasicBlock::iterator
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eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const override;
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protected:
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uint64_t estimateStackSize(const MachineFunction &MF) const;
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};
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/// Create MipsFrameLowering objects.
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const MipsFrameLowering *createMips16FrameLowering(const MipsSubtarget &ST);
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const MipsFrameLowering *createMipsSEFrameLowering(const MipsSubtarget &ST);
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} // End llvm namespace
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#endif
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