shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
llvm-project/llvm/lib/Target/RISCV/MCTargetDesc
History
Paul Kirth aa1d2693c2 [CodeGen][RISCV] Change Shadow Call Stack Register to X3 
ShadowCallStack implementation uses s2 register on RISC-V, but that
choice is problematic for reasons described in:

https://lists.riscv.org/g/sig-toolchains/message/544,
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/370, and
https://github.com/google/android-riscv64/issues/72

The concern over the register choice was also brought up in
https://reviews.llvm.org/D84414.

https://reviews.llvm.org/D84414#2228666 said:

```
  "If the register choice is the only concern about this work, then I think
  we can probably land it as-is and fixup the register choice if we see
  major drawbacks later. Yes, it's an ABI issue, but on the other hand the
  shadow call stack is not a standard ABI anyway.""
```

Since we have now found a sufficient reason to fixup the register
choice, we should go ahead and update the implementation. We propose
using x3(gp) which is now the platform register in the RISC-V ABI.

Reviewed By: asb, hiraditya, mcgrathr, craig.topper

Differential Revision: https://reviews.llvm.org/D146463
2023-04-12 21:06:22 +00:00
..
CMakeLists.txt
[Support] Move TargetParsers to new component
2022-12-20 11:05:50 +00:00
RISCVAsmBackend.cpp
[RISCV] Rename FeatureExtZc* to FeatureStdExtZc*. NFC
2023-03-27 13:19:01 -07:00
RISCVAsmBackend.h
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVBaseInfo.cpp
[CodeGen][RISCV] Change Shadow Call Stack Register to X3
2023-04-12 21:06:22 +00:00
RISCVBaseInfo.h
[RISCV] Support assembler and dis-assembler for VCIX extension.
2023-04-09 20:41:01 -07:00
RISCVELFObjectWriter.cpp
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVELFStreamer.cpp
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVELFStreamer.h
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVFixupKinds.h
[RISCV] Move RISCVELFStreamer::getRelocPairForSize to RISCVFixUpKinds.h and reuse it. NFC
2023-01-31 13:10:13 -08:00
RISCVInstPrinter.cpp
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVInstPrinter.h
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVMatInt.cpp
[RISCV] Rename FeatureExtZc* to FeatureStdExtZc*. NFC
2023-03-27 13:19:01 -07:00
RISCVMatInt.h
[RISCV] Add accessors to RISCVMatInt::Inst.
2022-12-07 19:02:01 -08:00
RISCVMCAsmInfo.cpp
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVMCAsmInfo.h
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVMCCodeEmitter.cpp
[RISCV] Rename FeatureExtZc* to FeatureStdExtZc*. NFC
2023-03-27 13:19:01 -07:00
RISCVMCExpr.cpp
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVMCExpr.h
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVMCObjectFileInfo.cpp
[RISCV] Rename FeatureExtZc* to FeatureStdExtZc*. NFC
2023-03-27 13:19:01 -07:00
RISCVMCObjectFileInfo.h
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVMCTargetDesc.cpp
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVMCTargetDesc.h
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVTargetStreamer.cpp
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00
RISCVTargetStreamer.h
[RISCV] Replace RISCV -> RISC-V in comments. NFC
2023-03-27 09:50:17 -07:00