427fb35192
The LIT test cases were migrated with the script provided by Nikita Popov. Due to the size of the change it is split into several parts. Reviewed By: nemanja, amyk, nikic, PowerPC Differential Revision: https://reviews.llvm.org/D135470
85 lines
2.4 KiB
LLVM
85 lines
2.4 KiB
LLVM
; RUN: llc -O0 -frame-pointer=all -mtriple=powerpc-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC32
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; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC64
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; RUN: llc -O0 -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefix=PPC64-ELFv2
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declare void @foo()
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define i32 @test_cr2() nounwind uwtable {
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entry:
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%ret = alloca i32, align 4
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%0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind
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store i32 %0, ptr %ret, align 4
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call void @foo()
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%1 = load i32, ptr %ret, align 4
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ret i32 %1
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}
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; PPC32-LABEL: test_cr2:
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; PPC32: stwu 1, -32(1)
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; PPC32: stw 31, 28(1)
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; PPC32: mfcr 12
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; PPC32-NEXT: stw 12, 24(31)
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; PPC32: lwz 12, 24(31)
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; PPC32-NEXT: mtocrf 32, 12
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; PPC64: .cfi_startproc
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; PPC64: mfcr 12
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; PPC64: stw 12, 8(1)
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; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
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; PPC64: .cfi_def_cfa_offset 128
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; PPC64: .cfi_offset lr, 16
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; PPC64: .cfi_offset cr2, 8
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; PPC64: addi 1, 1, [[AMT]]
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; PPC64: lwz 12, 8(1)
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; PPC64: mtocrf 32, 12
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; PPC64: .cfi_endproc
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define i32 @test_cr234() nounwind {
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entry:
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%ret = alloca i32, align 4
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%0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind
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store i32 %0, ptr %ret, align 4
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call void @foo()
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%1 = load i32, ptr %ret, align 4
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ret i32 %1
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}
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; PPC32-LABEL: test_cr234:
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; PPC32: stwu 1, -32(1)
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; PPC32: stw 31, 28(1)
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; PPC32: mfcr 12
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; PPC32-NEXT: stw 12, 24(31)
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; PPC32: lwz 12, 24(31)
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; PPC32-NEXT: mtocrf 32, 12
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; PPC32-NEXT: mtocrf 16, 12
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; PPC32-NEXT: mtocrf 8, 12
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; PPC64: mfcr 12
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; PPC64: stw 12, 8(1)
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; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
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; PPC64: addi 1, 1, [[AMT]]
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; PPC64: lwz 12, 8(1)
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; PPC64: mtocrf 32, 12
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; PPC64: mtocrf 16, 12
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; PPC64: mtocrf 8, 12
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; Generate mfocrf in prologue when we need to save 1 nonvolatile CR field
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define void @cloberOneNvCrField() {
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entry:
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tail call void asm sideeffect "# clobbers", "~{cr2}"()
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ret void
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; PPC64-ELFv2-LABEL: @cloberOneNvCrField
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; PPC64-ELFv2: mfocrf [[REG1:[0-9]+]], 32
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}
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; Generate mfcr in prologue when we need to save all nonvolatile CR field
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define void @cloberAllNvCrField() {
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entry:
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tail call void asm sideeffect "# clobbers", "~{cr2},~{cr3},~{cr4}"()
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ret void
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; PPC64-ELFv2-LABEL: @cloberAllNvCrField
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; PPC64-ELFv2: mfcr [[REG1:[0-9]+]]
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}
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