
mflr is kind of expensive on Power version smaller than 10, so we should schedule the store for the mflr's def away from mflr. In epilogue, the expensive mtlr has no user for its def, so it doesn't matter that the load and the mtlr are back-to-back. Reviewed By: RolandF Differential Revision: https://reviews.llvm.org/D137423
59 lines
2.0 KiB
LLVM
59 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=powerpc64-- -verify-machineinstrs \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
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%struct.e.0.1.2.3.12.29 = type { [10 x i32] }
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define dso_local void @g(ptr %agg.result) local_unnamed_addr #0 {
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; CHECK-LABEL: g:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr r0
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; CHECK-NEXT: stdu r1, -112(r1)
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; CHECK-NEXT: std r0, 128(r1)
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; CHECK-NEXT: bl i
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; CHECK-NEXT: nop
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; CHECK-NEXT: addis r4, r2, g@toc@ha
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; CHECK-NEXT: addi r4, r4, g@toc@l
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; CHECK-NEXT: ld r5, 16(r4)
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; CHECK-NEXT: std r5, 16(r3)
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; CHECK-NEXT: ld r6, 0(r4)
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; CHECK-NEXT: std r6, 0(r3)
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; CHECK-NEXT: rldicl r6, r6, 32, 32
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; CHECK-NEXT: ld r7, 8(r4)
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; CHECK-NEXT: std r7, 8(r3)
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; CHECK-NEXT: ld r7, 24(r4)
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; CHECK-NEXT: std r7, 24(r3)
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; CHECK-NEXT: ld r4, 32(r4)
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; CHECK-NEXT: std r4, 32(r3)
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; CHECK-NEXT: li r4, 20
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; CHECK-NEXT: stwbrx r6, 0, r3
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; CHECK-NEXT: stwbrx r5, r3, r4
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; CHECK-NEXT: addi r1, r1, 112
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; CHECK-NEXT: ld r0, 16(r1)
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; CHECK-NEXT: mtlr r0
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; CHECK-NEXT: blr
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entry:
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%call = tail call signext i32 @i()
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%conv = sext i32 %call to i64
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%0 = inttoptr i64 %conv to ptr
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tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 4 dereferenceable(40) %0, ptr nonnull align 4 dereferenceable(40) @g, i64 40, i1 false)
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%1 = inttoptr i64 %conv to ptr
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%2 = load i32, ptr %1, align 4
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%rev.i = tail call i32 @llvm.bswap.i32(i32 %2)
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store i32 %rev.i, ptr %1, align 4
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%incdec.ptr.i.4 = getelementptr inbounds i32, ptr %1, i64 5
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%3 = load i32, ptr %incdec.ptr.i.4, align 4
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%rev.i.5 = tail call i32 @llvm.bswap.i32(i32 %3)
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store i32 %rev.i.5, ptr %incdec.ptr.i.4, align 4
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ret void
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}
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declare i32 @i(...) local_unnamed_addr
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; Function Attrs: argmemonly nounwind willreturn
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declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #1
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; Function Attrs: nounwind readnone speculatable willreturn
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declare i32 @llvm.bswap.i32(i32)
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attributes #0 = { nounwind }
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