1492c88f49
This patch fixes the following two bugs in `PPCInstrInfo::isSignOrZeroExtended` helper, which is used from sign-/zero-extension elimination in PPCMIPeephole pass. - Registers defined by load with update (e.g. LBZU) were identified as already sign or zero-extended. But it is true only for the first def (loaded value) and not for the second def (i.e. updated pointer). - Registers defined by ORIS/XORIS were identified as already sign-extended. But, it is not true for sign extension depending on the immediate (while it is ok for zero extension). To handle the first case, the parameter for the helpers is changed from `MachineInstr` to a register number to distinguish first and second defs. Also, this patch moves the initialization of PPCMIPeepholePass to allow mir test case. Reviewed By: nemanjai Differential Revision: https://reviews.llvm.org/D40554
140 lines
3.3 KiB
LLVM
140 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-unknown %s -o - | FileCheck %s
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define i32 @xori64i32(i64 %a) {
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; CHECK-LABEL: xori64i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: sradi 3, 3, 63
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: xoris 3, 3, 32767
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; CHECK-NEXT: blr
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%shr4 = ashr i64 %a, 63
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%conv5 = trunc i64 %shr4 to i32
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%xor = xor i32 %conv5, 2147483647
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ret i32 %xor
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}
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define i64 @selecti64i64(i64 %a) {
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; CHECK-LABEL: selecti64i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: sradi 3, 3, 63
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: xoris 3, 3, 32767
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; CHECK-NEXT: blr
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%c = icmp sgt i64 %a, -1
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%s = select i1 %c, i64 2147483647, i64 -2147483648
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ret i64 %s
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}
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define i32 @selecti64i32(i64 %a) {
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; CHECK-LABEL: selecti64i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: sradi 3, 3, 63
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: xoris 3, 3, 32767
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; CHECK-NEXT: blr
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%c = icmp sgt i64 %a, -1
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%s = select i1 %c, i32 2147483647, i32 -2147483648
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ret i32 %s
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}
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define i64 @selecti32i64(i32 %a) {
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; CHECK-LABEL: selecti32i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srawi 3, 3, 31
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: xoris 3, 3, 32767
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; CHECK-NEXT: blr
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%c = icmp sgt i32 %a, -1
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%s = select i1 %c, i64 2147483647, i64 -2147483648
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ret i64 %s
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}
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define i8 @xori32i8(i32 %a) {
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; CHECK-LABEL: xori32i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srawi 3, 3, 31
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; CHECK-NEXT: xori 3, 3, 84
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; CHECK-NEXT: blr
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%shr4 = ashr i32 %a, 31
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%conv5 = trunc i32 %shr4 to i8
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%xor = xor i8 %conv5, 84
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ret i8 %xor
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}
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define i32 @selecti32i32(i32 %a) {
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; CHECK-LABEL: selecti32i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srawi 3, 3, 31
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; CHECK-NEXT: xori 3, 3, 84
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; CHECK-NEXT: blr
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%c = icmp sgt i32 %a, -1
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%s = select i1 %c, i32 84, i32 -85
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ret i32 %s
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}
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define i8 @selecti32i8(i32 %a) {
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; CHECK-LABEL: selecti32i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srawi 3, 3, 31
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; CHECK-NEXT: xori 3, 3, 84
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; CHECK-NEXT: blr
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%c = icmp sgt i32 %a, -1
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%s = select i1 %c, i8 84, i8 -85
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ret i8 %s
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}
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define i32 @selecti8i32(i8 %a) {
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; CHECK-LABEL: selecti8i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: extsb 3, 3
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; CHECK-NEXT: srawi 3, 3, 7
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; CHECK-NEXT: xori 3, 3, 84
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; CHECK-NEXT: blr
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%c = icmp sgt i8 %a, -1
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%s = select i1 %c, i32 84, i32 -85
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ret i32 %s
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}
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define i32 @icmpasreq(i32 %input, i32 %a, i32 %b) {
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; CHECK-LABEL: icmpasreq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpwi 3, 0
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; CHECK-NEXT: isellt 3, 4, 5
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; CHECK-NEXT: blr
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%sh = ashr i32 %input, 31
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%c = icmp eq i32 %sh, -1
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%s = select i1 %c, i32 %a, i32 %b
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ret i32 %s
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}
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define i32 @icmpasrne(i32 %input, i32 %a, i32 %b) {
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; CHECK-LABEL: icmpasrne:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpwi 3, -1
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; CHECK-NEXT: iselgt 3, 4, 5
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; CHECK-NEXT: blr
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%sh = ashr i32 %input, 31
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%c = icmp ne i32 %sh, -1
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%s = select i1 %c, i32 %a, i32 %b
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ret i32 %s
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}
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define i32 @oneusecmp(i32 %a, i32 %b, i32 %d) {
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; CHECK-LABEL: oneusecmp:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srawi 6, 3, 31
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; CHECK-NEXT: cmpwi 3, 0
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; CHECK-NEXT: xori 3, 6, 127
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; CHECK-NEXT: isellt 4, 5, 4
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; CHECK-NEXT: add 3, 3, 4
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; CHECK-NEXT: blr
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%c = icmp sle i32 %a, -1
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%s = select i1 %c, i32 -128, i32 127
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%s2 = select i1 %c, i32 %d, i32 %b
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%x = add i32 %s, %s2
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ret i32 %x
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}
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