llvm-project/llvm/test/CodeGen/PowerPC/testComparesllless.ll
Kai Nacke 5403c59c60 [PPC] Opaque pointer migration, part 2.
The LIT test cases were migrated with the script provided by
Nikita Popov. Due to the size of the change it is split into
several parts.

Reviewed By: nemanja, nikic

Differential Revision: https://reviews.llvm.org/D135474
2022-10-11 17:24:06 +00:00

128 lines
4.2 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
@glob = dso_local local_unnamed_addr global i16 0, align 2
define i64 @test_llless(i16 signext %a, i16 signext %b) {
; CHECK-LABEL: test_llless:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sub r3, r4, r3
; CHECK-NEXT: rldicl r3, r3, 1, 63
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: blr
; CHECK-BE-LABEL: test_llless:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: sub r3, r4, r3
; CHECK-BE-NEXT: rldicl r3, r3, 1, 63
; CHECK-BE-NEXT: xori r3, r3, 1
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_llless:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: sub r3, r4, r3
; CHECK-LE-NEXT: rldicl r3, r3, 1, 63
; CHECK-LE-NEXT: xori r3, r3, 1
; CHECK-LE-NEXT: blr
entry:
%cmp = icmp sle i16 %a, %b
%conv3 = zext i1 %cmp to i64
ret i64 %conv3
}
define i64 @test_llless_sext(i16 signext %a, i16 signext %b) {
; CHECK-LABEL: test_llless_sext:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sub r3, r4, r3
; CHECK-NEXT: rldicl r3, r3, 1, 63
; CHECK-NEXT: addi r3, r3, -1
; CHECK-NEXT: blr
; CHECK-BE-LABEL: test_llless_sext:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: sub r3, r4, r3
; CHECK-BE-NEXT: rldicl r3, r3, 1, 63
; CHECK-BE-NEXT: addi r3, r3, -1
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_llless_sext:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: sub r3, r4, r3
; CHECK-LE-NEXT: rldicl r3, r3, 1, 63
; CHECK-LE-NEXT: addi r3, r3, -1
; CHECK-LE-NEXT: blr
entry:
%cmp = icmp sle i16 %a, %b
%conv3 = sext i1 %cmp to i64
ret i64 %conv3
}
define dso_local void @test_llless_store(i16 signext %a, i16 signext %b) {
; CHECK-LABEL: test_llless_store:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sub r3, r4, r3
; CHECK-NEXT: addis r5, r2, glob@toc@ha
; CHECK-NEXT: rldicl r3, r3, 1, 63
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: sth r3, glob@toc@l(r5)
; CHECK-NEXT: blr
; CHECK-BE-LABEL: test_llless_store:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: sub r3, r4, r3
; CHECK-BE-NEXT: addis r5, r2, glob@toc@ha
; CHECK-BE-NEXT: rldicl r3, r3, 1, 63
; CHECK-BE-NEXT: xori r3, r3, 1
; CHECK-BE-NEXT: sth r3, glob@toc@l(r5)
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_llless_store:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: sub r3, r4, r3
; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
; CHECK-LE-NEXT: rldicl r3, r3, 1, 63
; CHECK-LE-NEXT: xori r3, r3, 1
; CHECK-LE-NEXT: sth r3, glob@toc@l(r5)
; CHECK-LE-NEXT: blr
entry:
%cmp = icmp sle i16 %a, %b
%conv3 = zext i1 %cmp to i16
store i16 %conv3, ptr @glob, align 2
ret void
}
define dso_local void @test_llless_sext_store(i16 signext %a, i16 signext %b) {
; CHECK-LABEL: test_llless_sext_store:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sub r3, r4, r3
; CHECK-NEXT: addis r5, r2, glob@toc@ha
; CHECK-NEXT: rldicl r3, r3, 1, 63
; CHECK-NEXT: addi r3, r3, -1
; CHECK-NEXT: sth r3, glob@toc@l(r5)
; CHECK-NEXT: blr
; CHECK-BE-LABEL: test_llless_sext_store:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: sub r3, r4, r3
; CHECK-BE-NEXT: addis r5, r2, glob@toc@ha
; CHECK-BE-NEXT: rldicl r3, r3, 1, 63
; CHECK-BE-NEXT: addi r3, r3, -1
; CHECK-BE-NEXT: sth r3, glob@toc@l(r5)
; CHECK-BE-NEXT: blr
;
; CHECK-LE-LABEL: test_llless_sext_store:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: sub r3, r4, r3
; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
; CHECK-LE-NEXT: rldicl r3, r3, 1, 63
; CHECK-LE-NEXT: addi r3, r3, -1
; CHECK-LE-NEXT: sth r3, glob@toc@l(r5)
; CHECK-LE-NEXT: blr
entry:
%cmp = icmp sle i16 %a, %b
%conv3 = sext i1 %cmp to i16
store i16 %conv3, ptr @glob, align 2
ret void
}