5050da7ba1
This patch adds basic assembler and MC layer infrastructure for
RISC-V big-endian targets (riscv32be/riscv64be):
- Register big-endian targets in RISCVTargetMachine
- Add big-endian data layout strings
- Implement endianness-aware fixup application in assembler
backend
- Add byte swapping for data fixups on BE cores
- Update MC layer components (AsmInfo, MCTargetDesc, Disassembler,
AsmParser)
This provides the foundation for BE support but does not yet include:
- Codegen patterns for BE
- Load/store instruction handling
- BE-specific subtarget features
81 lines
3.0 KiB
C++
81 lines
3.0 KiB
C++
//===-- RISCVAsmBackend.h - RISC-V Assembler Backend ----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVASMBACKEND_H
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#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVASMBACKEND_H
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#include "MCTargetDesc/RISCVBaseInfo.h"
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#include "MCTargetDesc/RISCVFixupKinds.h"
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#include "MCTargetDesc/RISCVMCTargetDesc.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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namespace llvm {
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class MCAssembler;
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class MCObjectTargetWriter;
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class raw_ostream;
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class RISCVAsmBackend : public MCAsmBackend {
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const MCSubtargetInfo &STI;
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uint8_t OSABI;
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bool Is64Bit;
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const MCTargetOptions &TargetOptions;
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// Temporary symbol used to check whether a PC-relative fixup is resolved.
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MCSymbol *PCRelTemp = nullptr;
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bool isPCRelFixupResolved(const MCSymbol *SymA, const MCFragment &F);
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StringMap<MCSymbol *> VendorSymbols;
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public:
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RISCVAsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit,
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bool IsLittleEndian, const MCTargetOptions &Options);
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~RISCVAsmBackend() override = default;
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std::optional<bool> evaluateFixup(const MCFragment &, MCFixup &, MCValue &,
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uint64_t &) override;
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bool addReloc(const MCFragment &, const MCFixup &, const MCValue &,
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uint64_t &FixedValue, bool IsResolved);
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void maybeAddVendorReloc(const MCFragment &, const MCFixup &);
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void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target,
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uint8_t *Data, uint64_t Value, bool IsResolved) override;
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std::unique_ptr<MCObjectTargetWriter>
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createObjectTargetWriter() const override;
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bool fixupNeedsRelaxationAdvanced(const MCFragment &, const MCFixup &,
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const MCValue &, uint64_t,
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bool) const override;
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std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
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MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
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bool mayNeedRelaxation(unsigned Opcode, ArrayRef<MCOperand> Operands,
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const MCSubtargetInfo &STI) const override;
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void relaxInstruction(MCInst &Inst,
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const MCSubtargetInfo &STI) const override;
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bool relaxAlign(MCFragment &F, unsigned &Size) override;
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bool relaxDwarfLineAddr(MCFragment &F, bool &WasRelaxed) const override;
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bool relaxDwarfCFA(MCFragment &F, bool &WasRelaxed) const override;
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std::pair<bool, bool> relaxLEB128(MCFragment &LF,
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int64_t &Value) const override;
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bool writeNopData(raw_ostream &OS, uint64_t Count,
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const MCSubtargetInfo *STI) const override;
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const MCTargetOptions &getTargetOptions() const { return TargetOptions; }
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};
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}
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#endif
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