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llvm-project/llvm/test/CodeGen
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Jon Roelofs be8738324c [MachineVerifier] Diagnose invalid INSERT_SUBREGs 
Differential revision: https://reviews.llvm.org/D105953
2021-07-20 17:32:29 -07:00
..
AArch64
[GlobalISel] Tail call memcpy/memmove/memset even in the presence of copies
2021-07-20 17:04:33 -07:00
AMDGPU
[AMDGPU] Improve register computation for indirect calls
2021-07-20 13:48:50 +02:00
ARC
…
ARM
[ARM] Remove PromotedBitwiseVT for NEON types
2021-07-19 16:36:33 +01:00
AVR
Place the BlockAddress type in the address space of the containing function
2021-07-02 12:17:55 +01:00
BPF
[BPF] Use elementtype attribute for preserve.array/struct.index intrinsics
2021-07-17 11:09:18 +02:00
Generic
[llc] Default MCUseDwarfDirectory to true
2021-07-12 17:44:02 -07:00
Hexagon
[DAG] Reassociate Add with Or
2021-07-07 10:21:07 +01:00
Inputs
…
Lanai
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
M68k
[M68k][GloballSel] LegalizerInfo implementation
2021-07-15 13:00:43 -06:00
Mips
[MIPS][MSA] Regenerate basic operations test checks
2021-07-20 13:37:44 +01:00
MIR
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
MSP430
…
NVPTX
[NVPTX] Add select(cc,binop(),binop()) fast-math tests
2021-07-18 15:30:24 +01:00
PowerPC
[PowerPC] Implemented mtmsr, mfspr, mtspr Builtins
2021-07-20 17:51:00 -05:00
RISCV
[RISCV] Teach RISCVMatInt about cases where it can use LUI+SLLI to replace LUI+ADDI+SLLI for large constants.
2021-07-20 09:22:06 -07:00
SPARC
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
SystemZ
[SystemZ] Handle NoRegister in SystemZTargetLowering::emitMemMemWrapper().
2021-07-19 20:04:44 +02:00
Thumb
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
Thumb2
[ARM] Extend more reductions during lowering
2021-07-19 08:58:03 +01:00
VE
[LegalizeTypes][VE] Don't Expand BITREVERSE/BSWAP during type legalization promotion if they will be promoted for NVT in op legalization.
2021-06-29 11:00:11 -07:00
WebAssembly
[WebAssembly] Codegen for v128.storeX_lane instructions
2021-07-14 16:15:25 -07:00
WinCFGuard
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WinEH
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X86
[MachineVerifier] Diagnose invalid INSERT_SUBREGs
2021-07-20 17:32:29 -07:00
XCore
Update @llvm.powi to handle different int sizes for the exponent
2021-06-17 09:38:28 +02:00