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llvm-project/llvm/test/CodeGen
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Amara Emerson 520ab710fb Revert "Revert "[GlobalISel] Fold xor(cmp(pred, _, _), 1) -> cmp(inverse(pred), _, _)" (and dependent patch "Optimize away a Not feeding a brcond by using tbz instead of tbnz.")" 
This reverts commit 8693ddc74371dedc742c9f3d3e4eda1da72c13ea.

Re-committing with the test requiring asserts.
2020-09-01 14:29:04 -07:00
..
AArch64
Revert "Revert "[GlobalISel] Fold xor(cmp(pred, _, _), 1) -> cmp(inverse(pred), _, _)" (and dependent patch "Optimize away a Not feeding a brcond by using tbz instead of tbnz.")"
2020-09-01 14:29:04 -07:00
AMDGPU
Revert "Revert "[GlobalISel] Fold xor(cmp(pred, _, _), 1) -> cmp(inverse(pred), _, _)" (and dependent patch "Optimize away a Not feeding a brcond by using tbz instead of tbnz.")"
2020-09-01 14:29:04 -07:00
ARC
[ARC] Update brcc test.
2020-08-28 17:07:25 -07:00
ARM
Revert "[ARM] Register pressure with -mthumb forces register reload before each call"
2020-09-01 07:39:54 +01:00
AVR
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BPF
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Generic
[Tests] Be consistent w/definition of statepoint-example
2020-08-14 20:45:48 -07:00
Hexagon
[Hexagon] Fix perfect shuffle generation for single vectors
2020-08-30 06:43:16 -05:00
Inputs
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Lanai
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Mips
GlobalISel: Add generic instructions for memory intrinsics
2020-08-26 20:08:45 -04:00
MIR
MIR: Infer not-SSA for subregister defs
2020-08-27 16:56:16 -04:00
MSP430
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NVPTX
[NVPTX] Fix typo in lit test
2020-08-17 16:02:11 -04:00
PowerPC
[PowerPC][AIX] Update save/restore offset for frame and base pointers.
2020-09-01 14:13:05 -04:00
RISCV
[RISC-V] ADDI/ORI/XORI x, 0 should be as cheap as a move
2020-08-27 10:32:22 +01:00
SPARC
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SystemZ
Revert "[BPI] Improve static heuristics for integer comparisons"
2020-08-17 20:44:33 +02:00
Thumb
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Thumb2
[DAGCombiner] Fold an AND of a masked load into a zext_masked_load
2020-09-01 17:02:07 +01:00
VE
[VE] Support f128
2020-08-17 17:26:52 +09:00
WebAssembly
[SelectionDAG] Handle non-power-of-2 bitwidths in expandROT
2020-08-26 09:20:46 +01:00
WinCFGuard
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WinEH
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X86
[MachineCopyPropagation] In isNopCopy, check the destination registers match in addition to the source registers.
2020-09-01 12:44:32 -07:00
XCore
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