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llvm-project/llvm/lib/Target/AMDGPU
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Tom Stellard 1e1b05db24 AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL 
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D13804

llvm-svn: 252291
2015-11-06 11:45:14 +00:00
..
AsmParser
AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL
2015-11-06 11:45:14 +00:00
InstPrinter
AMDGPU: Fix parsing of 32-bit literals with sign bit set
2015-10-23 18:07:58 +00:00
MCTargetDesc
AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL
2015-11-06 11:45:14 +00:00
TargetInfo
…
Utils
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
AMDGPU.h
AMDGPU: Initialize SIFixSGPRCopies so -print-after works
2015-11-03 22:30:13 +00:00
AMDGPU.td
AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
2015-07-16 19:40:07 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPU: Minor cleanups to always inline pass
2015-07-13 19:08:36 +00:00
AMDGPUAsmPrinter.cpp
AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL
2015-11-06 11:45:14 +00:00
AMDGPUAsmPrinter.h
AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL
2015-11-06 11:45:14 +00:00
AMDGPUCallingConv.td
…
AMDGPUDiagnosticInfoUnsupported.cpp
AMDGPU: Split DiagnosticInfoUnsupported into its own file
2015-10-21 22:37:46 +00:00
AMDGPUDiagnosticInfoUnsupported.h
AMDGPU: Split DiagnosticInfoUnsupported into its own file
2015-10-21 22:37:46 +00:00
AMDGPUFrameLowering.cpp
Remove redundant TargetFrameLowering::getFrameIndexOffset virtual
2015-08-15 02:32:35 +00:00
AMDGPUFrameLowering.h
Remove redundant TargetFrameLowering::getFrameIndexOffset virtual
2015-08-15 02:32:35 +00:00
AMDGPUHSATargetObjectFile.cpp
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
AMDGPUHSATargetObjectFile.h
AMDGPU: address -Winconsistent-missing-override
2015-09-26 04:34:52 +00:00
AMDGPUInstrInfo.cpp
Make a bunch of static arrays const.
2015-10-18 05:15:34 +00:00
AMDGPUInstrInfo.h
AMDGPU: Make getNamedOperandIdx declaration readonly
2015-09-25 18:09:15 +00:00
AMDGPUInstrInfo.td
…
AMDGPUInstructions.td
…
AMDGPUIntrinsicInfo.cpp
…
AMDGPUIntrinsicInfo.h
…
AMDGPUIntrinsics.td
…
AMDGPUISelDAGToDAG.cpp
AMDGPU: Alphabetize includes
2015-11-03 22:30:08 +00:00
AMDGPUISelLowering.cpp
AMDGPU: Split DiagnosticInfoUnsupported into its own file
2015-10-21 22:37:46 +00:00
AMDGPUISelLowering.h
DAGCombiner: Combine extract_vector_elt from build_vector
2015-10-12 23:59:50 +00:00
AMDGPUMachineFunction.cpp
…
AMDGPUMachineFunction.h
AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL
2015-11-06 11:45:14 +00:00
AMDGPUMCInstLower.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
AMDGPUMCInstLower.h
…
AMDGPUOpenCLImageTypeLoweringPass.cpp
AMDGPU/SI: Remove assert from AMDGPUOpenCLImageTypeLowering pass
2015-10-01 21:16:05 +00:00
AMDGPUPromoteAlloca.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
AMDGPURegisterInfo.cpp
…
AMDGPURegisterInfo.h
AMDGPU: Remove dead code
2015-09-19 06:41:10 +00:00
AMDGPURegisterInfo.td
AMDGPU: Set SubRegIndex size and offset
2015-07-30 17:03:11 +00:00
AMDGPUSubtarget.cpp
Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.
2015-09-15 16:17:27 +00:00
AMDGPUSubtarget.h
AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
2015-07-16 19:40:07 +00:00
AMDGPUTargetMachine.cpp
AMDGPU: Initialize SIFixSGPRCopies so -print-after works
2015-11-03 22:30:13 +00:00
AMDGPUTargetMachine.h
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
AMDGPUTargetTransformInfo.cpp
…
AMDGPUTargetTransformInfo.h
Make TargetTransformInfo keeping a reference to the Module DataLayout
2015-07-09 02:08:42 +00:00
AMDILCFGStructurizer.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
AMDKernelCodeT.h
AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
2015-06-26 21:58:31 +00:00
CaymanInstructions.td
AMDGPU: Add MEM_RAT STORE_TYPED.
2015-10-01 17:51:34 +00:00
CIInstructions.td
AMDGPU: Add s_dcache_* instructions
2015-09-24 19:52:27 +00:00
CMakeLists.txt
AMDGPU: Split DiagnosticInfoUnsupported into its own file
2015-10-21 22:37:46 +00:00
EvergreenInstructions.td
AMDGPU: Add MEM_RAT STORE_TYPED.
2015-10-01 17:51:34 +00:00
LLVMBuild.txt
AMDGPU/SI: Add hsa code object directives
2015-06-26 21:15:07 +00:00
Makefile
AMDGPU/SI: Add hsa code object directives
2015-06-26 21:15:07 +00:00
Processors.td
AMDGPU/SI: Add Fiji support
2015-08-06 19:43:02 +00:00
R600ClauseMergePass.cpp
…
R600ControlFlowFinalizer.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
R600Defines.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
…
R600InstrFormats.td
…
R600InstrInfo.cpp
Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC.
2015-09-10 23:10:42 +00:00
R600InstrInfo.h
Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC.
2015-09-10 23:10:42 +00:00
R600Instructions.td
Fix typos.
2015-09-12 01:17:08 +00:00
R600Intrinsics.td
…
R600ISelLowering.cpp
AMDGPU: Add MEM_RAT STORE_TYPED.
2015-10-01 17:51:34 +00:00
R600ISelLowering.h
Make TargetLowering::getPointerTy() taking DataLayout as an argument
2015-07-09 02:09:04 +00:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600OptimizeVectorRegisters.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
R600Packetizer.cpp
ScheduleDAGInstrs: Remove IsPostRA flag; NFC
2015-11-03 01:53:29 +00:00
R600RegisterInfo.cpp
…
R600RegisterInfo.h
AMDGPU: Remove dead code
2015-09-19 06:41:10 +00:00
R600RegisterInfo.td
…
R600Schedule.td
…
R600TextureIntrinsicsReplacer.cpp
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
SIDefines.h
AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp
2015-10-06 15:57:53 +00:00
SIFixControlFlowLiveIntervals.cpp
AMDGPU: Remove unused includes
2015-09-25 00:28:43 +00:00
SIFixSGPRCopies.cpp
AMDGPU: Initialize SIFixSGPRCopies so -print-after works
2015-11-03 22:30:13 +00:00
SIFixSGPRLiveRanges.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
SIFoldOperands.cpp
AMDGPU: Fix verifier error in SIFoldOperands
2015-10-21 22:37:50 +00:00
SIInsertWaits.cpp
AMDGPU: Add MachineInstr overloads for instruction format tests
2015-10-20 04:35:43 +00:00
SIInstrFormats.td
AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp
2015-10-06 15:57:53 +00:00
SIInstrInfo.cpp
AMDGPU: Also track whether SGPRs were spilled
2015-11-05 05:27:10 +00:00
SIInstrInfo.h
AMDGPU: Fix assert when legalizing atomic operands
2015-11-05 02:46:56 +00:00
SIInstrInfo.td
AMDGPU: Fix assert when legalizing atomic operands
2015-11-05 02:46:56 +00:00
SIInstructions.td
AMDGPU/SI: use S_OR for fneg (fabs f32)
2015-10-29 15:29:05 +00:00
SIIntrinsics.td
…
SIISelLowering.cpp
AMDGPU: Error on graphics shaders with HSA
2015-11-02 23:23:02 +00:00
SIISelLowering.h
AMDGPU: Assume SMRD access for constant address space
2015-08-07 20:18:34 +00:00
SILoadStoreOptimizer.cpp
AMDGPU/SI: Fix read2 merging into a super register.
2015-07-14 17:57:36 +00:00
SILowerControlFlow.cpp
AMDGPU: Fix adding redundant m0 uses
2015-10-21 22:37:51 +00:00
SILowerI1Copies.cpp
AMDGPU: Fix recomputing dominator tree unnecessarily
2015-09-25 17:21:28 +00:00
SIMachineFunctionInfo.cpp
AMDGPU: Also track whether SGPRs were spilled
2015-11-05 05:27:10 +00:00
SIMachineFunctionInfo.h
AMDGPU: Also track whether SGPRs were spilled
2015-11-05 05:27:10 +00:00
SIPrepareScratchRegs.cpp
AMDGPU: Add MachineInstr overloads for instruction format tests
2015-10-20 04:35:43 +00:00
SIRegisterInfo.cpp
AMDGPU: s[102:103] is unavailable on VI
2015-11-03 22:39:52 +00:00
SIRegisterInfo.h
AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order
2015-10-01 02:02:46 +00:00
SIRegisterInfo.td
AMDGPU: Define correct number of SGPRs
2015-11-03 22:39:50 +00:00
SISchedule.td
AMDGPU: Improve accuracy of instruction rates for VOPC
2015-09-25 16:58:25 +00:00
SIShrinkInstructions.cpp
AMDGPU: Add MachineInstr overloads for instruction format tests
2015-10-20 04:35:43 +00:00
SITypeRewriter.cpp
…
VIInstrFormats.td
…
VIInstructions.td
AMDGPU: Fix typo
2015-11-05 01:03:08 +00:00