63bc5d7863
Change to expand MULHU/MULHS/UMUL_LOHI/SMUL_LOHI for i32 and i64 since those instructions are not available on Aurora SX VE. Some of them are used in expansion of i128 multiply, so need to modify them to support i128. Then, update basic arithmetic regression tests of i128 and signed/unsigned i32 typed integer values. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D85490
257 lines
6.6 KiB
LLVM
257 lines
6.6 KiB
LLVM
; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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define signext i8 @func8s(i8 signext %a, i8 signext %b) {
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; CHECK-LABEL: func8s:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, %s1, %s0
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; CHECK-NEXT: sll %s0, %s0, 56
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; CHECK-NEXT: sra.l %s0, %s0, 56
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i8 %b, %a
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ret i8 %r
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}
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define signext i16 @func16s(i16 signext %a, i16 signext %b) {
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; CHECK-LABEL: func16s:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, %s1, %s0
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; CHECK-NEXT: sll %s0, %s0, 48
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; CHECK-NEXT: sra.l %s0, %s0, 48
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i16 %b, %a
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ret i16 %r
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}
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define signext i32 @func32s(i32 signext %a, i32 signext %b) {
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; CHECK-LABEL: func32s:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, %s1, %s0
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; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul nsw i32 %b, %a
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ret i32 %r
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}
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define i64 @func64(i64 %a, i64 %b) {
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; CHECK-LABEL: func64:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.l %s0, %s1, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul nsw i64 %b, %a
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ret i64 %r
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}
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define i128 @func128(i128 %a, i128 %b) {
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; CHECK-LABEL: func128:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: or %s4, 0, %s1
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; CHECK-NEXT: or %s5, 0, %s0
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; CHECK-NEXT: lea %s0, __multi3@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s12, __multi3@hi(, %s0)
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; CHECK-NEXT: or %s0, 0, %s2
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; CHECK-NEXT: or %s1, 0, %s3
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; CHECK-NEXT: or %s2, 0, %s5
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; CHECK-NEXT: or %s3, 0, %s4
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; CHECK-NEXT: bsic %s10, (, %s12)
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul nsw i128 %b, %a
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ret i128 %r
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}
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define zeroext i8 @func8z(i8 zeroext %a, i8 zeroext %b) {
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; CHECK-LABEL: func8z:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, %s1, %s0
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; CHECK-NEXT: and %s0, %s0, (56)0
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i8 %b, %a
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ret i8 %r
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}
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define zeroext i16 @func16z(i16 zeroext %a, i16 zeroext %b) {
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; CHECK-LABEL: func16z:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, %s1, %s0
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; CHECK-NEXT: and %s0, %s0, (48)0
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i16 %b, %a
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ret i16 %r
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}
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define zeroext i32 @func32z(i32 zeroext %a, i32 zeroext %b) {
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; CHECK-LABEL: func32z:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, %s1, %s0
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; CHECK-NEXT: adds.w.zx %s0, %s0, (0)1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i32 %b, %a
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ret i32 %r
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}
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define i64 @func64z(i64 %a, i64 %b) {
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; CHECK-LABEL: func64z:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.l %s0, %s1, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i64 %b, %a
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ret i64 %r
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}
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define i128 @func128z(i128 %a, i128 %b) {
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; CHECK-LABEL: func128z:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: or %s4, 0, %s1
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; CHECK-NEXT: or %s5, 0, %s0
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; CHECK-NEXT: lea %s0, __multi3@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s12, __multi3@hi(, %s0)
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; CHECK-NEXT: or %s0, 0, %s2
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; CHECK-NEXT: or %s1, 0, %s3
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; CHECK-NEXT: or %s2, 0, %s5
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; CHECK-NEXT: or %s3, 0, %s4
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; CHECK-NEXT: bsic %s10, (, %s12)
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i128 %b, %a
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ret i128 %r
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}
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define signext i8 @funci8s(i8 signext %a) {
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; CHECK-LABEL: funci8s:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, 5, %s0
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; CHECK-NEXT: sll %s0, %s0, 56
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; CHECK-NEXT: sra.l %s0, %s0, 56
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i8 %a, 5
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ret i8 %r
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}
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define signext i16 @funci16s(i16 signext %a) {
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; CHECK-LABEL: funci16s:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, 5, %s0
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; CHECK-NEXT: sll %s0, %s0, 48
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; CHECK-NEXT: sra.l %s0, %s0, 48
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i16 %a, 5
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ret i16 %r
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}
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define signext i32 @funci32s(i32 signext %a) {
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; CHECK-LABEL: funci32s:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, 5, %s0
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; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul nsw i32 %a, 5
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ret i32 %r
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}
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define i64 @funci64(i64 %a) {
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; CHECK-LABEL: funci64:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.l %s0, 5, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul nsw i64 %a, 5
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ret i64 %r
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}
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define i128 @funci128(i128 %a) {
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; CHECK-LABEL: funci128:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s2, __multi3@lo
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; CHECK-NEXT: and %s2, %s2, (32)0
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; CHECK-NEXT: lea.sl %s12, __multi3@hi(, %s2)
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; CHECK-NEXT: or %s2, 5, (0)1
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; CHECK-NEXT: or %s3, 0, (0)1
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; CHECK-NEXT: bsic %s10, (, %s12)
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul nsw i128 %a, 5
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ret i128 %r
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}
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define zeroext i8 @funci8z(i8 zeroext %a) {
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; CHECK-LABEL: funci8z:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, 5, %s0
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; CHECK-NEXT: and %s0, %s0, (56)0
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i8 %a, 5
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ret i8 %r
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}
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define zeroext i16 @funci16z(i16 zeroext %a) {
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; CHECK-LABEL: funci16z:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, 5, %s0
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; CHECK-NEXT: and %s0, %s0, (48)0
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i16 %a, 5
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ret i16 %r
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}
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define zeroext i32 @funci32z(i32 zeroext %a) {
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; CHECK-LABEL: funci32z:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.w.sx %s0, 5, %s0
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; CHECK-NEXT: adds.w.zx %s0, %s0, (0)1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i32 %a, 5
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ret i32 %r
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}
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define i64 @funci64z(i64 %a) {
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; CHECK-LABEL: funci64z:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: muls.l %s0, 5, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i64 %a, 5
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ret i64 %r
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}
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define i128 @funci128z(i128 %a) {
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; CHECK-LABEL: funci128z:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s2, __multi3@lo
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; CHECK-NEXT: and %s2, %s2, (32)0
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; CHECK-NEXT: lea.sl %s12, __multi3@hi(, %s2)
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; CHECK-NEXT: or %s2, 5, (0)1
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; CHECK-NEXT: or %s3, 0, (0)1
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; CHECK-NEXT: bsic %s10, (, %s12)
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; CHECK-NEXT: or %s11, 0, %s9
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%r = mul i128 %a, 5
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ret i128 %r
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}
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define zeroext i32 @funci32z_2(i32 zeroext %a) {
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; CHECK-LABEL: funci32z_2:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: sla.w.sx %s0, %s0, 31
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; CHECK-NEXT: adds.w.zx %s0, %s0, (0)1
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; CHECK-NEXT: or %s11, 0, %s9
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%r = shl i32 %a, 31
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ret i32 %r
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}
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define i64 @funci64_2(i64 %a) {
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; CHECK-LABEL: funci64_2:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: sll %s0, %s0, 31
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; CHECK-NEXT: or %s11, 0, %s9
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%r = shl nsw i64 %a, 31
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ret i64 %r
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}
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define i128 @funci128_2(i128 %a) {
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; CHECK-LABEL: funci128_2:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: srl %s2, %s0, 33
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; CHECK-NEXT: sll %s1, %s1, 31
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; CHECK-NEXT: or %s1, %s1, %s2
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; CHECK-NEXT: sll %s0, %s0, 31
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; CHECK-NEXT: or %s11, 0, %s9
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%r = shl nsw i128 %a, 31
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ret i128 %r
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}
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