78de7297ab
NOTE: There is a mailing list discussion on this: http://lists.llvm.org/pipermail/llvm-dev/2019-December/137632.html Complemantary to the assumption outliner prototype in D71692, this patch shows how we could simplify the code emitted for an alignemnt assumption. The generated code is smaller, less fragile, and it makes it easier to recognize the additional use as a "assumption use". As mentioned in D71692 and on the mailing list, we could adopt this scheme, and similar schemes for other patterns, without adopting the assumption outlining.
105 lines
4.5 KiB
LLVM
105 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -O2 -preserve-alignment-assumptions-during-inlining=0 < %s | FileCheck %s --check-prefixes=CHECK,ASSUMPTIONS-OFF,FALLBACK-0
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; RUN: opt -S -O2 -preserve-alignment-assumptions-during-inlining=1 < %s | FileCheck %s --check-prefixes=CHECK,ASSUMPTIONS-ON,FALLBACK-1
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; RUN: opt -S -O2 < %s | FileCheck %s --check-prefixes=CHECK,ASSUMPTIONS-OFF,FALLBACK-DEFAULT
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target datalayout = "e-p:64:64-p5:32:32-A5"
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; This illustrates an optimization difference caused by instruction counting
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; heuristics, which are affected by the additional instructions of the
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; alignment assumption.
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define internal i1 @callee1(i1 %c, i64* align 8 %ptr) {
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store volatile i64 0, i64* %ptr
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ret i1 %c
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}
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define void @caller1(i1 %c, i64* align 1 %ptr) {
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; ASSUMPTIONS-OFF-LABEL: @caller1(
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; ASSUMPTIONS-OFF-NEXT: br i1 [[C:%.*]], label [[TRUE2:%.*]], label [[FALSE2:%.*]]
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; ASSUMPTIONS-OFF: true2:
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 0, i64* [[PTR:%.*]], align 8
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 2, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: ret void
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; ASSUMPTIONS-OFF: false2:
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 1, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: store volatile i64 3, i64* [[PTR]], align 4
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; ASSUMPTIONS-OFF-NEXT: ret void
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;
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; ASSUMPTIONS-ON-LABEL: @caller1(
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; ASSUMPTIONS-ON-NEXT: br i1 [[C:%.*]], label [[TRUE2_CRITEDGE:%.*]], label [[FALSE1:%.*]]
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; ASSUMPTIONS-ON: false1:
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; ASSUMPTIONS-ON-NEXT: store volatile i64 1, i64* [[PTR:%.*]], align 8
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; ASSUMPTIONS-ON-NEXT: call void @llvm.assume(i1 true) [ "align"(i64* [[PTR]], i64 8) ]
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; ASSUMPTIONS-ON-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 3, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: ret void
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; ASSUMPTIONS-ON: true2.critedge:
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; ASSUMPTIONS-ON-NEXT: call void @llvm.assume(i1 true) [ "align"(i64* [[PTR]], i64 8) ]
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; ASSUMPTIONS-ON-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: store volatile i64 2, i64* [[PTR]], align 8
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; ASSUMPTIONS-ON-NEXT: ret void
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;
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br i1 %c, label %true1, label %false1
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true1:
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%c2 = call i1 @callee1(i1 %c, i64* %ptr)
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store volatile i64 -1, i64* %ptr
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store volatile i64 -1, i64* %ptr
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store volatile i64 -1, i64* %ptr
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store volatile i64 -1, i64* %ptr
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store volatile i64 -1, i64* %ptr
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br i1 %c2, label %true2, label %false2
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false1:
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store volatile i64 1, i64* %ptr
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br label %true1
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true2:
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store volatile i64 2, i64* %ptr
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ret void
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false2:
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store volatile i64 3, i64* %ptr
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ret void
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}
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; This test checks that alignment assumptions do not prevent SROA.
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; See PR45763.
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define internal void @callee2(i64* noalias sret align 32 %arg) {
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store i64 0, i64* %arg, align 8
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ret void
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}
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define amdgpu_kernel void @caller2() {
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; CHECK-LABEL: @caller2(
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; CHECK-NEXT: ret void
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;
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%alloca = alloca i64, align 8, addrspace(5)
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%cast = addrspacecast i64 addrspace(5)* %alloca to i64*
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call void @callee2(i64* sret align 32 %cast)
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ret void
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}
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