This is one (small) part of improving PR41312: https://llvm.org/PR41312 As shown there and in the smaller tests here, if we have some member of the reduction values that does not match the others, we want to push it to the end (bring the matching members forward and together). In the regression tests, we have 5 candidates for the 4 slots of the reduction. If the one "wrong" compare is grouped with the others, it prevents forming the ideal v4i1 compare reduction. Differential Revision: https://reviews.llvm.org/D87772
197 lines
9.0 KiB
LLVM
197 lines
9.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -basic-aa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.7.0"
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@.str = private unnamed_addr constant [6 x i8] c"bingo\00", align 1
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define void @reduce_compare(double* nocapture %A, i32 %n) {
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; CHECK-LABEL: @reduce_compare(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[N:%.*]] to double
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[CONV]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[CONV]], i32 1
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = shl nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, double* [[A:%.*]], i64 [[TMP2]]
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[ARRAYIDX]] to <2 x double>*
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; CHECK-NEXT: [[TMP4:%.*]] = load <2 x double>, <2 x double>* [[TMP3]], align 8
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; CHECK-NEXT: [[TMP5:%.*]] = fmul <2 x double> [[TMP1]], [[TMP4]]
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; CHECK-NEXT: [[TMP6:%.*]] = fmul <2 x double> [[TMP5]], <double 7.000000e+00, double 4.000000e+00>
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; CHECK-NEXT: [[TMP7:%.*]] = fadd <2 x double> [[TMP6]], <double 5.000000e+00, double 9.000000e+00>
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; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[TMP7]], i32 0
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; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x double> [[TMP7]], i32 1
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; CHECK-NEXT: [[CMP11:%.*]] = fcmp ogt double [[TMP8]], [[TMP9]]
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; CHECK-NEXT: br i1 [[CMP11]], label [[IF_THEN:%.*]], label [[FOR_INC]]
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; CHECK: if.then:
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; CHECK-NEXT: [[CALL:%.*]] = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
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; CHECK-NEXT: br label [[FOR_INC]]
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; CHECK: for.inc:
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], 100
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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%conv = sitofp i32 %n to double
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br label %for.body
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for.body: ; preds = %for.inc, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ]
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%0 = shl nsw i64 %indvars.iv, 1
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%arrayidx = getelementptr inbounds double, double* %A, i64 %0
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%1 = load double, double* %arrayidx, align 8
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%mul1 = fmul double %conv, %1
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%mul2 = fmul double %mul1, 7.000000e+00
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%add = fadd double %mul2, 5.000000e+00
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%2 = or i64 %0, 1
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%arrayidx6 = getelementptr inbounds double, double* %A, i64 %2
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%3 = load double, double* %arrayidx6, align 8
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%mul8 = fmul double %conv, %3
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%mul9 = fmul double %mul8, 4.000000e+00
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%add10 = fadd double %mul9, 9.000000e+00
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%cmp11 = fcmp ogt double %add, %add10
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br i1 %cmp11, label %if.then, label %for.inc
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if.then: ; preds = %for.body
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%call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
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br label %for.inc
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for.inc: ; preds = %for.body, %if.then
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 100
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.inc
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ret void
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}
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declare i32 @printf(i8* nocapture, ...)
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; PR41312 - the order of the reduction ops should not prevent forming a reduction.
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; The 'wrong' member of the reduction requires a greater cost if grouped with the
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; other candidates in the reduction because it does not have matching predicate
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; and/or constant operand.
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define float @merge_anyof_v4f32_wrong_first(<4 x float> %x) {
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; CHECK-LABEL: @merge_anyof_v4f32_wrong_first(
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; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[X:%.*]], i32 3
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; CHECK-NEXT: [[CMP3WRONG:%.*]] = fcmp olt float [[TMP1]], 4.200000e+01
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; CHECK-NEXT: [[TMP2:%.*]] = fcmp ogt <4 x float> [[X]], <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
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; CHECK-NEXT: [[TMP3:%.*]] = call i1 @llvm.experimental.vector.reduce.or.v4i1(<4 x i1> [[TMP2]])
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; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[CMP3WRONG]]
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; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP4]], float -1.000000e+00, float 1.000000e+00
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; CHECK-NEXT: ret float [[R]]
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;
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%x0 = extractelement <4 x float> %x, i32 0
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%x1 = extractelement <4 x float> %x, i32 1
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%x2 = extractelement <4 x float> %x, i32 2
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%x3 = extractelement <4 x float> %x, i32 3
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%cmp3wrong = fcmp olt float %x3, 42.0
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%cmp0 = fcmp ogt float %x0, 1.0
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%cmp1 = fcmp ogt float %x1, 1.0
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%cmp2 = fcmp ogt float %x2, 1.0
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%cmp3 = fcmp ogt float %x3, 1.0
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%or03 = or i1 %cmp0, %cmp3wrong
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%or031 = or i1 %or03, %cmp1
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%or0312 = or i1 %or031, %cmp2
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%or03123 = or i1 %or0312, %cmp3
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%r = select i1 %or03123, float -1.0, float 1.0
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ret float %r
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}
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define float @merge_anyof_v4f32_wrong_last(<4 x float> %x) {
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; CHECK-LABEL: @merge_anyof_v4f32_wrong_last(
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; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[X:%.*]], i32 3
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; CHECK-NEXT: [[CMP3WRONG:%.*]] = fcmp olt float [[TMP1]], 4.200000e+01
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; CHECK-NEXT: [[TMP2:%.*]] = fcmp ogt <4 x float> [[X]], <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
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; CHECK-NEXT: [[TMP3:%.*]] = call i1 @llvm.experimental.vector.reduce.or.v4i1(<4 x i1> [[TMP2]])
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; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[CMP3WRONG]]
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; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP4]], float -1.000000e+00, float 1.000000e+00
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; CHECK-NEXT: ret float [[R]]
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;
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%x0 = extractelement <4 x float> %x, i32 0
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%x1 = extractelement <4 x float> %x, i32 1
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%x2 = extractelement <4 x float> %x, i32 2
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%x3 = extractelement <4 x float> %x, i32 3
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%cmp3wrong = fcmp olt float %x3, 42.0
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%cmp0 = fcmp ogt float %x0, 1.0
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%cmp1 = fcmp ogt float %x1, 1.0
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%cmp2 = fcmp ogt float %x2, 1.0
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%cmp3 = fcmp ogt float %x3, 1.0
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%or03 = or i1 %cmp0, %cmp3
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%or031 = or i1 %or03, %cmp1
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%or0312 = or i1 %or031, %cmp2
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%or03123 = or i1 %or0312, %cmp3wrong
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%r = select i1 %or03123, float -1.0, float 1.0
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ret float %r
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}
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define i32 @merge_anyof_v4i32_wrong_middle(<4 x i32> %x) {
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; CHECK-LABEL: @merge_anyof_v4i32_wrong_middle(
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; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 3
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; CHECK-NEXT: [[CMP3WRONG:%.*]] = icmp slt i32 [[TMP1]], 42
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; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt <4 x i32> [[X]], <i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: [[TMP3:%.*]] = call i1 @llvm.experimental.vector.reduce.or.v4i1(<4 x i1> [[TMP2]])
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; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[CMP3WRONG]]
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; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP4]], i32 -1, i32 1
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; CHECK-NEXT: ret i32 [[R]]
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;
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%x0 = extractelement <4 x i32> %x, i32 0
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%x1 = extractelement <4 x i32> %x, i32 1
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%x2 = extractelement <4 x i32> %x, i32 2
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%x3 = extractelement <4 x i32> %x, i32 3
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%cmp3wrong = icmp slt i32 %x3, 42
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%cmp0 = icmp sgt i32 %x0, 1
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%cmp1 = icmp sgt i32 %x1, 1
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%cmp2 = icmp sgt i32 %x2, 1
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%cmp3 = icmp sgt i32 %x3, 1
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%or03 = or i1 %cmp0, %cmp3
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%or033 = or i1 %or03, %cmp3wrong
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%or0332 = or i1 %or033, %cmp2
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%or03321 = or i1 %or0332, %cmp1
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%r = select i1 %or03321, i32 -1, i32 1
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ret i32 %r
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}
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; Operand/predicate swapping allows forming a reduction, but the
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; ideal reduction groups all of the original 'sgt' ops together.
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define i32 @merge_anyof_v4i32_wrong_middle_better_rdx(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: @merge_anyof_v4i32_wrong_middle_better_rdx(
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; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[Y:%.*]], i32 3
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; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 3
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; CHECK-NEXT: [[CMP3WRONG:%.*]] = icmp slt i32 [[TMP2]], [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt <4 x i32> [[X]], [[Y]]
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; CHECK-NEXT: [[TMP4:%.*]] = call i1 @llvm.experimental.vector.reduce.or.v4i1(<4 x i1> [[TMP3]])
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; CHECK-NEXT: [[TMP5:%.*]] = or i1 [[TMP4]], [[CMP3WRONG]]
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; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP5]], i32 -1, i32 1
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; CHECK-NEXT: ret i32 [[R]]
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;
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%x0 = extractelement <4 x i32> %x, i32 0
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%x1 = extractelement <4 x i32> %x, i32 1
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%x2 = extractelement <4 x i32> %x, i32 2
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%x3 = extractelement <4 x i32> %x, i32 3
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%y0 = extractelement <4 x i32> %y, i32 0
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%y1 = extractelement <4 x i32> %y, i32 1
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%y2 = extractelement <4 x i32> %y, i32 2
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%y3 = extractelement <4 x i32> %y, i32 3
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%cmp3wrong = icmp slt i32 %x3, %y3
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%cmp0 = icmp sgt i32 %x0, %y0
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%cmp1 = icmp sgt i32 %x1, %y1
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%cmp2 = icmp sgt i32 %x2, %y2
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%cmp3 = icmp sgt i32 %x3, %y3
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%or03 = or i1 %cmp0, %cmp3
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%or033 = or i1 %or03, %cmp3wrong
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%or0332 = or i1 %or033, %cmp2
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%or03321 = or i1 %or0332, %cmp1
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%r = select i1 %or03321, i32 -1, i32 1
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ret i32 %r
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}
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