Logo
Explore Help
Sign In
shylie/llvm-project
1
0
Fork 0
You've already forked llvm-project
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/llvm/test/CodeGen/MIR/AMDGPU
History
Tom Stellard 6695ba0440 AMDGPU/SI: Don't use non-0 waitcnt values when waiting on Flat instructions
Summary:
Flat instruction can return out of order, so we need always need to wait
for all the outstanding flat operations.

Reviewers: tony-tye, arsenm

Subscribers: kzhuravl, wdng, nhaehnle, llvm-commits, yaxunl

Differential Revision: https://reviews.llvm.org/D25998

llvm-svn: 285479
2016-10-28 23:53:48 +00:00
..
expected-target-index-name.mir
MachineRegisterInfo/MIR: Initialize tracksSubRegLiveness early, do not print/parser it
2016-08-24 22:17:45 +00:00
inserted-wait-states.mir
AMDGPU/SI: Handle hazard with s_rfe_b64
2016-10-27 23:50:21 +00:00
intrinsics.mir
GlobalISel: move type information to MachineRegisterInfo.
2016-09-09 11:46:34 +00:00
invalid-target-index-operand.mir
MachineRegisterInfo/MIR: Initialize tracksSubRegLiveness early, do not print/parser it
2016-08-24 22:17:45 +00:00
lit.local.cfg
…
optimize-if-exec-masking.mir
AMDGPU: Partially fix control flow at -O0
2016-09-29 01:44:16 +00:00
target-index-operands.mir
AMDGPU: Add definitions for scalar store instructions
2016-10-28 21:55:15 +00:00
waitcnt.mir
AMDGPU/SI: Don't use non-0 waitcnt values when waiting on Flat instructions
2016-10-28 23:53:48 +00:00
Powered by Gitea Version: 1.23.1 Page: 1032ms Template: 2ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API