56a0a7f6d1
The PR follows the earlier https://github.com/llvm/llvm-project/pull/123840 PR for atomic operation support in CUF
90 lines
3.9 KiB
Plaintext
90 lines
3.9 KiB
Plaintext
! RUN: bbc -emit-hlfir -fcuda %s -o - | FileCheck %s
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! Test CUDA Fortran procedures available in cudadevice module
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attributes(global) subroutine devsub()
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implicit none
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integer :: ret
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real(4) :: af
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real(8) :: ad
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integer(4) :: ai
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integer(8) :: al
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call syncthreads()
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call syncwarp(1)
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call threadfence()
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call threadfence_block()
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call threadfence_system()
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ret = syncthreads_and(1)
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ret = syncthreads_count(1)
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ret = syncthreads_or(1)
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ai = atomicadd(ai, 1_4)
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al = atomicadd(al, 1_8)
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af = atomicadd(af, 1.0_4)
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ad = atomicadd(ad, 1.0_8)
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ai = atomicsub(ai, 1_4)
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al = atomicsub(al, 1_8)
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af = atomicsub(af, 1.0_4)
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ad = atomicsub(ad, 1.0_8)
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ai = atomicmax(ai, 1_4)
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al = atomicmax(al, 1_8)
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af = atomicmax(af, 1.0_4)
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ad = atomicmax(ad, 1.0_8)
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ai = atomicmin(ai, 1_4)
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al = atomicmin(al, 1_8)
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af = atomicmin(af, 1.0_4)
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ad = atomicmin(ad, 1.0_8)
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ai = atomicand(ai, 1_4)
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ai = atomicor(ai, 1_4)
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ai = atomicinc(ai, 1_4)
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ai = atomicdec(ai, 1_4)
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end
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! CHECK-LABEL: func.func @_QPdevsub() attributes {cuf.proc_attr = #cuf.cuda_proc<global>}
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! CHECK: fir.call @llvm.nvvm.barrier0() fastmath<contract> : () -> ()
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! CHECK: fir.call @__syncwarp(%{{.*}}) proc_attrs<bind_c> fastmath<contract> : (!fir.ref<i32>) -> ()
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! CHECK: fir.call @llvm.nvvm.membar.gl() fastmath<contract> : () -> ()
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! CHECK: fir.call @llvm.nvvm.membar.cta() fastmath<contract> : () -> ()
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! CHECK: fir.call @llvm.nvvm.membar.sys() fastmath<contract> : () -> ()
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! CHECK: %{{.*}} = fir.call @llvm.nvvm.barrier0.and(%c1_i32_0) fastmath<contract> : (i32) -> i32
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! CHECK: %{{.*}} = fir.call @llvm.nvvm.barrier0.popc(%c1_i32_1) fastmath<contract> : (i32) -> i32
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! CHECK: %{{.*}} = fir.call @llvm.nvvm.barrier0.or(%c1_i32_2) fastmath<contract> : (i32) -> i32
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! CHECK: %{{.*}} = llvm.atomicrmw add %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i32
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! CHECK: %{{.*}} = llvm.atomicrmw add %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i64
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! CHECK: %{{.*}} = llvm.atomicrmw fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f32
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! CHECK: %{{.*}} = llvm.atomicrmw fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f64
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! CHECK: %{{.*}} = llvm.atomicrmw sub %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i32
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! CHECK: %{{.*}} = llvm.atomicrmw sub %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i64
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! CHECK: %{{.*}} = llvm.atomicrmw fsub %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f32
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! CHECK: %{{.*}} = llvm.atomicrmw fsub %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f64
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! CHECK: %{{.*}} = llvm.atomicrmw max %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i32
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! CHECK: %{{.*}} = llvm.atomicrmw max %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i64
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! CHECK: %{{.*}} = llvm.atomicrmw fmax %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f32
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! CHECK: %{{.*}} = llvm.atomicrmw fmax %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f64
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! CHECK: %{{.*}} = llvm.atomicrmw min %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i32
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! CHECK: %{{.*}} = llvm.atomicrmw min %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i64
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! CHECK: %{{.*}} = llvm.atomicrmw fmin %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f32
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! CHECK: %{{.*}} = llvm.atomicrmw fmin %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f64
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! CHECK: %{{.*}} = llvm.atomicrmw _and %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i32
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! CHECK: %{{.*}} = llvm.atomicrmw _or %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i32
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! CHECK: %{{.*}} = llvm.atomicrmw uinc_wrap %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i32
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! CHECK: %{{.*}} = llvm.atomicrmw udec_wrap %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i32
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! CHECK: func.func private @llvm.nvvm.barrier0()
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! CHECK: func.func private @__syncwarp(!fir.ref<i32> {cuf.data_attr = #cuf.cuda<device>}) attributes {cuf.proc_attr = #cuf.cuda_proc<device>, fir.bindc_name = "__syncwarp", fir.proc_attrs = #fir.proc_attrs<bind_c>}
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! CHECK: func.func private @llvm.nvvm.membar.gl()
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! CHECK: func.func private @llvm.nvvm.membar.cta()
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! CHECK: func.func private @llvm.nvvm.membar.sys()
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! CHECK: func.func private @llvm.nvvm.barrier0.and(i32) -> i32
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! CHECK: func.func private @llvm.nvvm.barrier0.popc(i32) -> i32
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! CHECK: func.func private @llvm.nvvm.barrier0.or(i32) -> i32
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