2bf92787df
(#159884) This eliminates the pseudo registerclasses used to hack the wave register class, which are now replaced with RegClassByHwMode, so most of the diff is from register class ID renumbering.
65 lines
3.2 KiB
LLVM
65 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -stop-after=finalize-isel -o - %s | FileCheck -check-prefix=GFX908 %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -stop-after=finalize-isel -o - %s | FileCheck -check-prefix=GFX90A %s
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; Make sure we only use one 128-bit register instead of 2 for i128 asm
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; constraints
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define amdgpu_kernel void @s_input_output_i128() {
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; GFX908-LABEL: name: s_input_output_i128
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; GFX908: bb.0 (%ir-block.0):
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; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 9764874 /* regdef:SGPR_128 */, def %13
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; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY %13
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; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 9764873 /* reguse:SGPR_128 */, [[COPY]]
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; GFX908-NEXT: S_ENDPGM 0
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;
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; GFX90A-LABEL: name: s_input_output_i128
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; GFX90A: bb.0 (%ir-block.0):
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; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 9764874 /* regdef:SGPR_128 */, def %11
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; GFX90A-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY %11
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; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 9764873 /* reguse:SGPR_128 */, [[COPY]]
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; GFX90A-NEXT: S_ENDPGM 0
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%val = tail call i128 asm sideeffect "; def $0", "=s"()
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call void asm sideeffect "; use $0", "s"(i128 %val)
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ret void
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}
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define amdgpu_kernel void @v_input_output_i128() {
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; GFX908-LABEL: name: v_input_output_i128
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; GFX908: bb.0 (%ir-block.0):
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; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 7012362 /* regdef:VReg_128 */, def %13
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; GFX908-NEXT: [[COPY:%[0-9]+]]:vreg_128 = COPY %13
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; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 7012361 /* reguse:VReg_128 */, [[COPY]]
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; GFX908-NEXT: S_ENDPGM 0
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;
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; GFX90A-LABEL: name: v_input_output_i128
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; GFX90A: bb.0 (%ir-block.0):
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; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 7340042 /* regdef:VReg_128_Align2 */, def %11
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; GFX90A-NEXT: [[COPY:%[0-9]+]]:vreg_128_align2 = COPY %11
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; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 7340041 /* reguse:VReg_128_Align2 */, [[COPY]]
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; GFX90A-NEXT: S_ENDPGM 0
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%val = tail call i128 asm sideeffect "; def $0", "=v"()
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call void asm sideeffect "; use $0", "v"(i128 %val)
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ret void
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}
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define amdgpu_kernel void @a_input_output_i128() {
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; GFX908-LABEL: name: a_input_output_i128
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; GFX908: bb.0 (%ir-block.0):
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; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 7929866 /* regdef:AReg_128 */, def %13
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; GFX908-NEXT: [[COPY:%[0-9]+]]:areg_128 = COPY %13
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; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 7929865 /* reguse:AReg_128 */, [[COPY]]
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; GFX908-NEXT: S_ENDPGM 0
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;
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; GFX90A-LABEL: name: a_input_output_i128
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; GFX90A: bb.0 (%ir-block.0):
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; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 8650762 /* regdef:AReg_128_Align2 */, def %11
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; GFX90A-NEXT: [[COPY:%[0-9]+]]:areg_128_align2 = COPY %11
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; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8650761 /* reguse:AReg_128_Align2 */, [[COPY]]
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; GFX90A-NEXT: S_ENDPGM 0
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%val = call i128 asm sideeffect "; def $0", "=a"()
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call void asm sideeffect "; use $0", "a"(i128 %val)
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ret void
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}
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