5a9c62ba48
Adds support for the `__builtin_ia32_kshiftli` and `__builtin_ia32_kshiftri` X86 builtins. Part of #167765 --------- Signed-off-by: vishruth-thimmaiah <vishruththimmaiah@gmail.com>
998 lines
42 KiB
C++
998 lines
42 KiB
C++
//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This contains code to emit x86/x86_64 Builtin calls as CIR or a function
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// call to be later resolved.
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//
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//===----------------------------------------------------------------------===//
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#include "CIRGenFunction.h"
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#include "CIRGenModule.h"
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#include "clang/Basic/Builtins.h"
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#include "clang/Basic/TargetBuiltins.h"
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#include "clang/CIR/MissingFeatures.h"
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using namespace clang;
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using namespace clang::CIRGen;
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template <typename... Operands>
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static mlir::Value emitIntrinsicCallOp(CIRGenFunction &cgf, const CallExpr *e,
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const std::string &str,
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const mlir::Type &resTy,
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Operands &&...op) {
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CIRGenBuilderTy &builder = cgf.getBuilder();
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mlir::Location location = cgf.getLoc(e->getExprLoc());
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return cir::LLVMIntrinsicCallOp::create(builder, location,
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builder.getStringAttr(str), resTy,
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std::forward<Operands>(op)...)
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.getResult();
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}
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// OG has unordered comparison as a form of optimization in addition to
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// ordered comparison, while CIR doesn't.
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//
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// This means that we can't encode the comparison code of UGT (unordered
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// greater than), at least not at the CIR level.
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//
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// The boolean shouldInvert compensates for this.
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// For example: to get to the comparison code UGT, we pass in
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// emitVectorFCmp (OLE, shouldInvert = true) since OLE is the inverse of UGT.
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// There are several ways to support this otherwise:
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// - register extra CmpOpKind for unordered comparison types and build the
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// translation code for
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// to go from CIR -> LLVM dialect. Notice we get this naturally with
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// shouldInvert, benefiting from existing infrastructure, albeit having to
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// generate an extra `not` at CIR).
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// - Just add extra comparison code to a new VecCmpOpKind instead of
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// cluttering CmpOpKind.
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// - Add a boolean in VecCmpOp to indicate if it's doing unordered or ordered
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// comparison
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// - Just emit the intrinsics call instead of calling this helper, see how the
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// LLVM lowering handles this.
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static mlir::Value emitVectorFCmp(CIRGenBuilderTy &builder,
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llvm::SmallVector<mlir::Value> &ops,
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mlir::Location loc, cir::CmpOpKind pred,
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bool shouldInvert) {
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assert(!cir::MissingFeatures::cgFPOptionsRAII());
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// TODO(cir): Add isSignaling boolean once emitConstrainedFPCall implemented
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assert(!cir::MissingFeatures::emitConstrainedFPCall());
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mlir::Value cmp = builder.createVecCompare(loc, pred, ops[0], ops[1]);
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mlir::Value bitCast = builder.createBitcast(
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shouldInvert ? builder.createNot(cmp) : cmp, ops[0].getType());
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return bitCast;
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}
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static mlir::Value getMaskVecValue(CIRGenFunction &cgf, const CallExpr *expr,
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mlir::Value mask, unsigned numElems) {
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CIRGenBuilderTy &builder = cgf.getBuilder();
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auto maskTy = cir::VectorType::get(
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builder.getUIntNTy(1), cast<cir::IntType>(mask.getType()).getWidth());
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mlir::Value maskVec = builder.createBitcast(mask, maskTy);
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// If we have less than 8 elements, then the starting mask was an i8 and
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// we need to extract down to the right number of elements.
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if (numElems < 8) {
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SmallVector<mlir::Attribute, 4> indices;
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mlir::Type i32Ty = builder.getSInt32Ty();
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for (auto i : llvm::seq<unsigned>(0, numElems))
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indices.push_back(cir::IntAttr::get(i32Ty, i));
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maskVec = builder.createVecShuffle(cgf.getLoc(expr->getExprLoc()), maskVec,
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maskVec, indices);
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}
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return maskVec;
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}
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mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
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const CallExpr *expr) {
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if (builtinID == Builtin::BI__builtin_cpu_is) {
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cgm.errorNYI(expr->getSourceRange(), "__builtin_cpu_is");
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return {};
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}
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if (builtinID == Builtin::BI__builtin_cpu_supports) {
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cgm.errorNYI(expr->getSourceRange(), "__builtin_cpu_supports");
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return {};
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}
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if (builtinID == Builtin::BI__builtin_cpu_init) {
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cgm.errorNYI(expr->getSourceRange(), "__builtin_cpu_init");
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return {};
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}
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// Handle MSVC intrinsics before argument evaluation to prevent double
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// evaluation.
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assert(!cir::MissingFeatures::msvcBuiltins());
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// Find out if any arguments are required to be integer constant expressions.
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assert(!cir::MissingFeatures::handleBuiltinICEArguments());
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// The operands of the builtin call
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llvm::SmallVector<mlir::Value> ops;
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// `ICEArguments` is a bitmap indicating whether the argument at the i-th bit
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// is required to be a constant integer expression.
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unsigned iceArguments = 0;
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ASTContext::GetBuiltinTypeError error;
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getContext().GetBuiltinType(builtinID, error, &iceArguments);
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assert(error == ASTContext::GE_None && "Error while getting builtin type.");
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for (auto [idx, arg] : llvm::enumerate(expr->arguments()))
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ops.push_back(emitScalarOrConstFoldImmArg(iceArguments, idx, arg));
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CIRGenBuilderTy &builder = getBuilder();
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mlir::Type voidTy = builder.getVoidTy();
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switch (builtinID) {
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default:
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return {};
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case X86::BI_mm_clflush:
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return emitIntrinsicCallOp(*this, expr, "x86.sse2.clflush", voidTy, ops[0]);
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case X86::BI_mm_lfence:
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return emitIntrinsicCallOp(*this, expr, "x86.sse2.lfence", voidTy);
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case X86::BI_mm_pause:
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return emitIntrinsicCallOp(*this, expr, "x86.sse2.pause", voidTy);
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case X86::BI_mm_mfence:
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return emitIntrinsicCallOp(*this, expr, "x86.sse2.mfence", voidTy);
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case X86::BI_mm_sfence:
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return emitIntrinsicCallOp(*this, expr, "x86.sse.sfence", voidTy);
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case X86::BI_mm_prefetch:
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case X86::BI__rdtsc:
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case X86::BI__builtin_ia32_rdtscp: {
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cgm.errorNYI(expr->getSourceRange(),
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std::string("unimplemented X86 builtin call: ") +
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getContext().BuiltinInfo.getName(builtinID));
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return {};
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}
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case X86::BI__builtin_ia32_lzcnt_u16:
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case X86::BI__builtin_ia32_lzcnt_u32:
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case X86::BI__builtin_ia32_lzcnt_u64: {
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mlir::Value isZeroPoison = builder.getFalse(getLoc(expr->getExprLoc()));
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return emitIntrinsicCallOp(*this, expr, "ctlz", ops[0].getType(),
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mlir::ValueRange{ops[0], isZeroPoison});
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}
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case X86::BI__builtin_ia32_tzcnt_u16:
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case X86::BI__builtin_ia32_tzcnt_u32:
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case X86::BI__builtin_ia32_tzcnt_u64: {
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mlir::Value isZeroPoison = builder.getFalse(getLoc(expr->getExprLoc()));
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return emitIntrinsicCallOp(*this, expr, "cttz", ops[0].getType(),
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mlir::ValueRange{ops[0], isZeroPoison});
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}
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case X86::BI__builtin_ia32_undef128:
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case X86::BI__builtin_ia32_undef256:
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case X86::BI__builtin_ia32_undef512:
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// The x86 definition of "undef" is not the same as the LLVM definition
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// (PR32176). We leave optimizing away an unnecessary zero constant to the
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// IR optimizer and backend.
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// TODO: If we had a "freeze" IR instruction to generate a fixed undef
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// value, we should use that here instead of a zero.
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return builder.getNullValue(convertType(expr->getType()),
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getLoc(expr->getExprLoc()));
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case X86::BI__builtin_ia32_vec_ext_v4hi:
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case X86::BI__builtin_ia32_vec_ext_v16qi:
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case X86::BI__builtin_ia32_vec_ext_v8hi:
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case X86::BI__builtin_ia32_vec_ext_v4si:
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case X86::BI__builtin_ia32_vec_ext_v4sf:
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case X86::BI__builtin_ia32_vec_ext_v2di:
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case X86::BI__builtin_ia32_vec_ext_v32qi:
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case X86::BI__builtin_ia32_vec_ext_v16hi:
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case X86::BI__builtin_ia32_vec_ext_v8si:
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case X86::BI__builtin_ia32_vec_ext_v4di: {
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unsigned numElts = cast<cir::VectorType>(ops[0].getType()).getSize();
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uint64_t index =
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ops[1].getDefiningOp<cir::ConstantOp>().getIntValue().getZExtValue();
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index &= numElts - 1;
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cir::ConstantOp indexVal =
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builder.getUInt64(index, getLoc(expr->getExprLoc()));
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// These builtins exist so we can ensure the index is an ICE and in range.
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// Otherwise we could just do this in the header file.
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return cir::VecExtractOp::create(builder, getLoc(expr->getExprLoc()),
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ops[0], indexVal);
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}
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case X86::BI__builtin_ia32_vec_set_v4hi:
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case X86::BI__builtin_ia32_vec_set_v16qi:
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case X86::BI__builtin_ia32_vec_set_v8hi:
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case X86::BI__builtin_ia32_vec_set_v4si:
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case X86::BI__builtin_ia32_vec_set_v2di:
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case X86::BI__builtin_ia32_vec_set_v32qi:
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case X86::BI__builtin_ia32_vec_set_v16hi:
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case X86::BI__builtin_ia32_vec_set_v8si:
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case X86::BI__builtin_ia32_vec_set_v4di:
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cgm.errorNYI(expr->getSourceRange(),
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std::string("unimplemented X86 builtin call: ") +
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getContext().BuiltinInfo.getName(builtinID));
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return {};
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case X86::BI_mm_setcsr:
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case X86::BI__builtin_ia32_ldmxcsr: {
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mlir::Location loc = getLoc(expr->getExprLoc());
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Address tmp = createMemTemp(expr->getArg(0)->getType(), loc);
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builder.createStore(loc, ops[0], tmp);
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return emitIntrinsicCallOp(*this, expr, "x86.sse.ldmxcsr",
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builder.getVoidTy(), tmp.getPointer());
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}
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case X86::BI_mm_getcsr:
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case X86::BI__builtin_ia32_stmxcsr: {
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mlir::Location loc = getLoc(expr->getExprLoc());
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Address tmp = createMemTemp(expr->getType(), loc);
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emitIntrinsicCallOp(*this, expr, "x86.sse.stmxcsr", builder.getVoidTy(),
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tmp.getPointer());
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return builder.createLoad(loc, tmp);
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}
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case X86::BI__builtin_ia32_xsave:
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case X86::BI__builtin_ia32_xsave64:
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case X86::BI__builtin_ia32_xrstor:
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case X86::BI__builtin_ia32_xrstor64:
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case X86::BI__builtin_ia32_xsaveopt:
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case X86::BI__builtin_ia32_xsaveopt64:
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case X86::BI__builtin_ia32_xrstors:
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case X86::BI__builtin_ia32_xrstors64:
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case X86::BI__builtin_ia32_xsavec:
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case X86::BI__builtin_ia32_xsavec64:
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case X86::BI__builtin_ia32_xsaves:
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case X86::BI__builtin_ia32_xsaves64:
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case X86::BI__builtin_ia32_xsetbv:
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case X86::BI_xsetbv:
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case X86::BI__builtin_ia32_xgetbv:
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case X86::BI_xgetbv:
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case X86::BI__builtin_ia32_storedqudi128_mask:
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case X86::BI__builtin_ia32_storedqusi128_mask:
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case X86::BI__builtin_ia32_storedquhi128_mask:
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case X86::BI__builtin_ia32_storedquqi128_mask:
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case X86::BI__builtin_ia32_storeupd128_mask:
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case X86::BI__builtin_ia32_storeups128_mask:
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case X86::BI__builtin_ia32_storedqudi256_mask:
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case X86::BI__builtin_ia32_storedqusi256_mask:
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case X86::BI__builtin_ia32_storedquhi256_mask:
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case X86::BI__builtin_ia32_storedquqi256_mask:
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case X86::BI__builtin_ia32_storeupd256_mask:
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case X86::BI__builtin_ia32_storeups256_mask:
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case X86::BI__builtin_ia32_storedqudi512_mask:
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case X86::BI__builtin_ia32_storedqusi512_mask:
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case X86::BI__builtin_ia32_storedquhi512_mask:
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case X86::BI__builtin_ia32_storedquqi512_mask:
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case X86::BI__builtin_ia32_storeupd512_mask:
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case X86::BI__builtin_ia32_storeups512_mask:
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case X86::BI__builtin_ia32_storesbf16128_mask:
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case X86::BI__builtin_ia32_storesh128_mask:
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case X86::BI__builtin_ia32_storess128_mask:
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case X86::BI__builtin_ia32_storesd128_mask:
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case X86::BI__builtin_ia32_cvtmask2b128:
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case X86::BI__builtin_ia32_cvtmask2b256:
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case X86::BI__builtin_ia32_cvtmask2b512:
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case X86::BI__builtin_ia32_cvtmask2w128:
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case X86::BI__builtin_ia32_cvtmask2w256:
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case X86::BI__builtin_ia32_cvtmask2w512:
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case X86::BI__builtin_ia32_cvtmask2d128:
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case X86::BI__builtin_ia32_cvtmask2d256:
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case X86::BI__builtin_ia32_cvtmask2d512:
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case X86::BI__builtin_ia32_cvtmask2q128:
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case X86::BI__builtin_ia32_cvtmask2q256:
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case X86::BI__builtin_ia32_cvtmask2q512:
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case X86::BI__builtin_ia32_cvtb2mask128:
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case X86::BI__builtin_ia32_cvtb2mask256:
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case X86::BI__builtin_ia32_cvtb2mask512:
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case X86::BI__builtin_ia32_cvtw2mask128:
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case X86::BI__builtin_ia32_cvtw2mask256:
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case X86::BI__builtin_ia32_cvtw2mask512:
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case X86::BI__builtin_ia32_cvtd2mask128:
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case X86::BI__builtin_ia32_cvtd2mask256:
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case X86::BI__builtin_ia32_cvtd2mask512:
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case X86::BI__builtin_ia32_cvtq2mask128:
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case X86::BI__builtin_ia32_cvtq2mask256:
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case X86::BI__builtin_ia32_cvtq2mask512:
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case X86::BI__builtin_ia32_cvtdq2ps512_mask:
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case X86::BI__builtin_ia32_cvtqq2ps512_mask:
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case X86::BI__builtin_ia32_cvtqq2pd512_mask:
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case X86::BI__builtin_ia32_vcvtw2ph512_mask:
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case X86::BI__builtin_ia32_vcvtdq2ph512_mask:
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case X86::BI__builtin_ia32_vcvtqq2ph512_mask:
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case X86::BI__builtin_ia32_cvtudq2ps512_mask:
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case X86::BI__builtin_ia32_cvtuqq2ps512_mask:
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case X86::BI__builtin_ia32_cvtuqq2pd512_mask:
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case X86::BI__builtin_ia32_vcvtuw2ph512_mask:
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case X86::BI__builtin_ia32_vcvtudq2ph512_mask:
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case X86::BI__builtin_ia32_vcvtuqq2ph512_mask:
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case X86::BI__builtin_ia32_vfmaddsh3_mask:
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case X86::BI__builtin_ia32_vfmaddss3_mask:
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case X86::BI__builtin_ia32_vfmaddsd3_mask:
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case X86::BI__builtin_ia32_vfmaddsh3_maskz:
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case X86::BI__builtin_ia32_vfmaddss3_maskz:
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case X86::BI__builtin_ia32_vfmaddsd3_maskz:
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case X86::BI__builtin_ia32_vfmaddsh3_mask3:
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case X86::BI__builtin_ia32_vfmaddss3_mask3:
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case X86::BI__builtin_ia32_vfmaddsd3_mask3:
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case X86::BI__builtin_ia32_vfmsubsh3_mask3:
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case X86::BI__builtin_ia32_vfmsubss3_mask3:
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case X86::BI__builtin_ia32_vfmsubsd3_mask3:
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case X86::BI__builtin_ia32_vfmaddph512_mask:
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case X86::BI__builtin_ia32_vfmaddph512_maskz:
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case X86::BI__builtin_ia32_vfmaddph512_mask3:
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case X86::BI__builtin_ia32_vfmaddps512_mask:
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case X86::BI__builtin_ia32_vfmaddps512_maskz:
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case X86::BI__builtin_ia32_vfmaddps512_mask3:
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case X86::BI__builtin_ia32_vfmsubps512_mask3:
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case X86::BI__builtin_ia32_vfmaddpd512_mask:
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case X86::BI__builtin_ia32_vfmaddpd512_maskz:
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case X86::BI__builtin_ia32_vfmaddpd512_mask3:
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case X86::BI__builtin_ia32_vfmsubpd512_mask3:
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case X86::BI__builtin_ia32_vfmsubph512_mask3:
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case X86::BI__builtin_ia32_vfmaddsubph512_mask:
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case X86::BI__builtin_ia32_vfmaddsubph512_maskz:
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case X86::BI__builtin_ia32_vfmaddsubph512_mask3:
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case X86::BI__builtin_ia32_vfmsubaddph512_mask3:
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case X86::BI__builtin_ia32_vfmaddsubps512_mask:
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case X86::BI__builtin_ia32_vfmaddsubps512_maskz:
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case X86::BI__builtin_ia32_vfmaddsubps512_mask3:
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case X86::BI__builtin_ia32_vfmsubaddps512_mask3:
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case X86::BI__builtin_ia32_vfmaddsubpd512_mask:
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case X86::BI__builtin_ia32_vfmaddsubpd512_maskz:
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case X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
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case X86::BI__builtin_ia32_vfmsubaddpd512_mask3:
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case X86::BI__builtin_ia32_movdqa32store128_mask:
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case X86::BI__builtin_ia32_movdqa64store128_mask:
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case X86::BI__builtin_ia32_storeaps128_mask:
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case X86::BI__builtin_ia32_storeapd128_mask:
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case X86::BI__builtin_ia32_movdqa32store256_mask:
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case X86::BI__builtin_ia32_movdqa64store256_mask:
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case X86::BI__builtin_ia32_storeaps256_mask:
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case X86::BI__builtin_ia32_storeapd256_mask:
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case X86::BI__builtin_ia32_movdqa32store512_mask:
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case X86::BI__builtin_ia32_movdqa64store512_mask:
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case X86::BI__builtin_ia32_storeaps512_mask:
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case X86::BI__builtin_ia32_storeapd512_mask:
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case X86::BI__builtin_ia32_loadups128_mask:
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case X86::BI__builtin_ia32_loadups256_mask:
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case X86::BI__builtin_ia32_loadups512_mask:
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case X86::BI__builtin_ia32_loadupd128_mask:
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case X86::BI__builtin_ia32_loadupd256_mask:
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case X86::BI__builtin_ia32_loadupd512_mask:
|
|
case X86::BI__builtin_ia32_loaddquqi128_mask:
|
|
case X86::BI__builtin_ia32_loaddquqi256_mask:
|
|
case X86::BI__builtin_ia32_loaddquqi512_mask:
|
|
case X86::BI__builtin_ia32_loaddquhi128_mask:
|
|
case X86::BI__builtin_ia32_loaddquhi256_mask:
|
|
case X86::BI__builtin_ia32_loaddquhi512_mask:
|
|
case X86::BI__builtin_ia32_loaddqusi128_mask:
|
|
case X86::BI__builtin_ia32_loaddqusi256_mask:
|
|
case X86::BI__builtin_ia32_loaddqusi512_mask:
|
|
case X86::BI__builtin_ia32_loaddqudi128_mask:
|
|
case X86::BI__builtin_ia32_loaddqudi256_mask:
|
|
case X86::BI__builtin_ia32_loaddqudi512_mask:
|
|
case X86::BI__builtin_ia32_loadsbf16128_mask:
|
|
case X86::BI__builtin_ia32_loadsh128_mask:
|
|
case X86::BI__builtin_ia32_loadss128_mask:
|
|
case X86::BI__builtin_ia32_loadsd128_mask:
|
|
case X86::BI__builtin_ia32_loadaps128_mask:
|
|
case X86::BI__builtin_ia32_loadaps256_mask:
|
|
case X86::BI__builtin_ia32_loadaps512_mask:
|
|
case X86::BI__builtin_ia32_loadapd128_mask:
|
|
case X86::BI__builtin_ia32_loadapd256_mask:
|
|
case X86::BI__builtin_ia32_loadapd512_mask:
|
|
case X86::BI__builtin_ia32_movdqa32load128_mask:
|
|
case X86::BI__builtin_ia32_movdqa32load256_mask:
|
|
case X86::BI__builtin_ia32_movdqa32load512_mask:
|
|
case X86::BI__builtin_ia32_movdqa64load128_mask:
|
|
case X86::BI__builtin_ia32_movdqa64load256_mask:
|
|
case X86::BI__builtin_ia32_movdqa64load512_mask:
|
|
case X86::BI__builtin_ia32_expandloaddf128_mask:
|
|
case X86::BI__builtin_ia32_expandloaddf256_mask:
|
|
case X86::BI__builtin_ia32_expandloaddf512_mask:
|
|
case X86::BI__builtin_ia32_expandloadsf128_mask:
|
|
case X86::BI__builtin_ia32_expandloadsf256_mask:
|
|
case X86::BI__builtin_ia32_expandloadsf512_mask:
|
|
case X86::BI__builtin_ia32_expandloaddi128_mask:
|
|
case X86::BI__builtin_ia32_expandloaddi256_mask:
|
|
case X86::BI__builtin_ia32_expandloaddi512_mask:
|
|
case X86::BI__builtin_ia32_expandloadsi128_mask:
|
|
case X86::BI__builtin_ia32_expandloadsi256_mask:
|
|
case X86::BI__builtin_ia32_expandloadsi512_mask:
|
|
case X86::BI__builtin_ia32_expandloadhi128_mask:
|
|
case X86::BI__builtin_ia32_expandloadhi256_mask:
|
|
case X86::BI__builtin_ia32_expandloadhi512_mask:
|
|
case X86::BI__builtin_ia32_expandloadqi128_mask:
|
|
case X86::BI__builtin_ia32_expandloadqi256_mask:
|
|
case X86::BI__builtin_ia32_expandloadqi512_mask:
|
|
case X86::BI__builtin_ia32_compressstoredf128_mask:
|
|
case X86::BI__builtin_ia32_compressstoredf256_mask:
|
|
case X86::BI__builtin_ia32_compressstoredf512_mask:
|
|
case X86::BI__builtin_ia32_compressstoresf128_mask:
|
|
case X86::BI__builtin_ia32_compressstoresf256_mask:
|
|
case X86::BI__builtin_ia32_compressstoresf512_mask:
|
|
case X86::BI__builtin_ia32_compressstoredi128_mask:
|
|
case X86::BI__builtin_ia32_compressstoredi256_mask:
|
|
case X86::BI__builtin_ia32_compressstoredi512_mask:
|
|
case X86::BI__builtin_ia32_compressstoresi128_mask:
|
|
case X86::BI__builtin_ia32_compressstoresi256_mask:
|
|
case X86::BI__builtin_ia32_compressstoresi512_mask:
|
|
case X86::BI__builtin_ia32_compressstorehi128_mask:
|
|
case X86::BI__builtin_ia32_compressstorehi256_mask:
|
|
case X86::BI__builtin_ia32_compressstorehi512_mask:
|
|
case X86::BI__builtin_ia32_compressstoreqi128_mask:
|
|
case X86::BI__builtin_ia32_compressstoreqi256_mask:
|
|
case X86::BI__builtin_ia32_compressstoreqi512_mask:
|
|
case X86::BI__builtin_ia32_expanddf128_mask:
|
|
case X86::BI__builtin_ia32_expanddf256_mask:
|
|
case X86::BI__builtin_ia32_expanddf512_mask:
|
|
case X86::BI__builtin_ia32_expandsf128_mask:
|
|
case X86::BI__builtin_ia32_expandsf256_mask:
|
|
case X86::BI__builtin_ia32_expandsf512_mask:
|
|
case X86::BI__builtin_ia32_expanddi128_mask:
|
|
case X86::BI__builtin_ia32_expanddi256_mask:
|
|
case X86::BI__builtin_ia32_expanddi512_mask:
|
|
case X86::BI__builtin_ia32_expandsi128_mask:
|
|
case X86::BI__builtin_ia32_expandsi256_mask:
|
|
case X86::BI__builtin_ia32_expandsi512_mask:
|
|
case X86::BI__builtin_ia32_expandhi128_mask:
|
|
case X86::BI__builtin_ia32_expandhi256_mask:
|
|
case X86::BI__builtin_ia32_expandhi512_mask:
|
|
case X86::BI__builtin_ia32_expandqi128_mask:
|
|
case X86::BI__builtin_ia32_expandqi256_mask:
|
|
case X86::BI__builtin_ia32_expandqi512_mask:
|
|
case X86::BI__builtin_ia32_compressdf128_mask:
|
|
case X86::BI__builtin_ia32_compressdf256_mask:
|
|
case X86::BI__builtin_ia32_compressdf512_mask:
|
|
case X86::BI__builtin_ia32_compresssf128_mask:
|
|
case X86::BI__builtin_ia32_compresssf256_mask:
|
|
case X86::BI__builtin_ia32_compresssf512_mask:
|
|
case X86::BI__builtin_ia32_compressdi128_mask:
|
|
case X86::BI__builtin_ia32_compressdi256_mask:
|
|
case X86::BI__builtin_ia32_compressdi512_mask:
|
|
case X86::BI__builtin_ia32_compresssi128_mask:
|
|
case X86::BI__builtin_ia32_compresssi256_mask:
|
|
case X86::BI__builtin_ia32_compresssi512_mask:
|
|
case X86::BI__builtin_ia32_compresshi128_mask:
|
|
case X86::BI__builtin_ia32_compresshi256_mask:
|
|
case X86::BI__builtin_ia32_compresshi512_mask:
|
|
case X86::BI__builtin_ia32_compressqi128_mask:
|
|
case X86::BI__builtin_ia32_compressqi256_mask:
|
|
case X86::BI__builtin_ia32_compressqi512_mask:
|
|
case X86::BI__builtin_ia32_gather3div2df:
|
|
case X86::BI__builtin_ia32_gather3div2di:
|
|
case X86::BI__builtin_ia32_gather3div4df:
|
|
case X86::BI__builtin_ia32_gather3div4di:
|
|
case X86::BI__builtin_ia32_gather3div4sf:
|
|
case X86::BI__builtin_ia32_gather3div4si:
|
|
case X86::BI__builtin_ia32_gather3div8sf:
|
|
case X86::BI__builtin_ia32_gather3div8si:
|
|
case X86::BI__builtin_ia32_gather3siv2df:
|
|
case X86::BI__builtin_ia32_gather3siv2di:
|
|
case X86::BI__builtin_ia32_gather3siv4df:
|
|
case X86::BI__builtin_ia32_gather3siv4di:
|
|
case X86::BI__builtin_ia32_gather3siv4sf:
|
|
case X86::BI__builtin_ia32_gather3siv4si:
|
|
case X86::BI__builtin_ia32_gather3siv8sf:
|
|
case X86::BI__builtin_ia32_gather3siv8si:
|
|
case X86::BI__builtin_ia32_gathersiv8df:
|
|
case X86::BI__builtin_ia32_gathersiv16sf:
|
|
case X86::BI__builtin_ia32_gatherdiv8df:
|
|
case X86::BI__builtin_ia32_gatherdiv16sf:
|
|
case X86::BI__builtin_ia32_gathersiv8di:
|
|
case X86::BI__builtin_ia32_gathersiv16si:
|
|
case X86::BI__builtin_ia32_gatherdiv8di:
|
|
case X86::BI__builtin_ia32_gatherdiv16si:
|
|
case X86::BI__builtin_ia32_scattersiv8df:
|
|
case X86::BI__builtin_ia32_scattersiv16sf:
|
|
case X86::BI__builtin_ia32_scatterdiv8df:
|
|
case X86::BI__builtin_ia32_scatterdiv16sf:
|
|
case X86::BI__builtin_ia32_scattersiv8di:
|
|
case X86::BI__builtin_ia32_scattersiv16si:
|
|
case X86::BI__builtin_ia32_scatterdiv8di:
|
|
case X86::BI__builtin_ia32_scatterdiv16si:
|
|
case X86::BI__builtin_ia32_scatterdiv2df:
|
|
case X86::BI__builtin_ia32_scatterdiv2di:
|
|
case X86::BI__builtin_ia32_scatterdiv4df:
|
|
case X86::BI__builtin_ia32_scatterdiv4di:
|
|
case X86::BI__builtin_ia32_scatterdiv4sf:
|
|
case X86::BI__builtin_ia32_scatterdiv4si:
|
|
case X86::BI__builtin_ia32_scatterdiv8sf:
|
|
case X86::BI__builtin_ia32_scatterdiv8si:
|
|
case X86::BI__builtin_ia32_scattersiv2df:
|
|
case X86::BI__builtin_ia32_scattersiv2di:
|
|
case X86::BI__builtin_ia32_scattersiv4df:
|
|
case X86::BI__builtin_ia32_scattersiv4di:
|
|
case X86::BI__builtin_ia32_scattersiv4sf:
|
|
case X86::BI__builtin_ia32_scattersiv4si:
|
|
case X86::BI__builtin_ia32_scattersiv8sf:
|
|
case X86::BI__builtin_ia32_scattersiv8si:
|
|
case X86::BI__builtin_ia32_vextractf128_pd256:
|
|
case X86::BI__builtin_ia32_vextractf128_ps256:
|
|
case X86::BI__builtin_ia32_vextractf128_si256:
|
|
case X86::BI__builtin_ia32_extract128i256:
|
|
case X86::BI__builtin_ia32_extractf64x4_mask:
|
|
case X86::BI__builtin_ia32_extractf32x4_mask:
|
|
case X86::BI__builtin_ia32_extracti64x4_mask:
|
|
case X86::BI__builtin_ia32_extracti32x4_mask:
|
|
case X86::BI__builtin_ia32_extractf32x8_mask:
|
|
case X86::BI__builtin_ia32_extracti32x8_mask:
|
|
case X86::BI__builtin_ia32_extractf32x4_256_mask:
|
|
case X86::BI__builtin_ia32_extracti32x4_256_mask:
|
|
case X86::BI__builtin_ia32_extractf64x2_256_mask:
|
|
case X86::BI__builtin_ia32_extracti64x2_256_mask:
|
|
case X86::BI__builtin_ia32_extractf64x2_512_mask:
|
|
case X86::BI__builtin_ia32_extracti64x2_512_mask:
|
|
case X86::BI__builtin_ia32_vinsertf128_pd256:
|
|
case X86::BI__builtin_ia32_vinsertf128_ps256:
|
|
case X86::BI__builtin_ia32_vinsertf128_si256:
|
|
case X86::BI__builtin_ia32_insert128i256:
|
|
case X86::BI__builtin_ia32_insertf64x4:
|
|
case X86::BI__builtin_ia32_insertf32x4:
|
|
case X86::BI__builtin_ia32_inserti64x4:
|
|
case X86::BI__builtin_ia32_inserti32x4:
|
|
case X86::BI__builtin_ia32_insertf32x8:
|
|
case X86::BI__builtin_ia32_inserti32x8:
|
|
case X86::BI__builtin_ia32_insertf32x4_256:
|
|
case X86::BI__builtin_ia32_inserti32x4_256:
|
|
case X86::BI__builtin_ia32_insertf64x2_256:
|
|
case X86::BI__builtin_ia32_inserti64x2_256:
|
|
case X86::BI__builtin_ia32_insertf64x2_512:
|
|
case X86::BI__builtin_ia32_inserti64x2_512:
|
|
case X86::BI__builtin_ia32_pmovqd512_mask:
|
|
case X86::BI__builtin_ia32_pmovwb512_mask:
|
|
case X86::BI__builtin_ia32_pblendw128:
|
|
case X86::BI__builtin_ia32_blendpd:
|
|
case X86::BI__builtin_ia32_blendps:
|
|
case X86::BI__builtin_ia32_blendpd256:
|
|
case X86::BI__builtin_ia32_blendps256:
|
|
case X86::BI__builtin_ia32_pblendw256:
|
|
case X86::BI__builtin_ia32_pblendd128:
|
|
case X86::BI__builtin_ia32_pblendd256:
|
|
case X86::BI__builtin_ia32_pshuflw:
|
|
case X86::BI__builtin_ia32_pshuflw256:
|
|
case X86::BI__builtin_ia32_pshuflw512:
|
|
case X86::BI__builtin_ia32_pshufhw:
|
|
case X86::BI__builtin_ia32_pshufhw256:
|
|
case X86::BI__builtin_ia32_pshufhw512:
|
|
case X86::BI__builtin_ia32_pshufd:
|
|
case X86::BI__builtin_ia32_pshufd256:
|
|
case X86::BI__builtin_ia32_pshufd512:
|
|
case X86::BI__builtin_ia32_vpermilpd:
|
|
case X86::BI__builtin_ia32_vpermilps:
|
|
case X86::BI__builtin_ia32_vpermilpd256:
|
|
case X86::BI__builtin_ia32_vpermilps256:
|
|
case X86::BI__builtin_ia32_vpermilpd512:
|
|
case X86::BI__builtin_ia32_vpermilps512:
|
|
case X86::BI__builtin_ia32_shufpd:
|
|
case X86::BI__builtin_ia32_shufpd256:
|
|
case X86::BI__builtin_ia32_shufpd512:
|
|
case X86::BI__builtin_ia32_shufps:
|
|
case X86::BI__builtin_ia32_shufps256:
|
|
case X86::BI__builtin_ia32_shufps512:
|
|
case X86::BI__builtin_ia32_permdi256:
|
|
case X86::BI__builtin_ia32_permdf256:
|
|
case X86::BI__builtin_ia32_permdi512:
|
|
case X86::BI__builtin_ia32_permdf512:
|
|
case X86::BI__builtin_ia32_palignr128:
|
|
case X86::BI__builtin_ia32_palignr256:
|
|
case X86::BI__builtin_ia32_palignr512:
|
|
case X86::BI__builtin_ia32_alignd128:
|
|
case X86::BI__builtin_ia32_alignd256:
|
|
case X86::BI__builtin_ia32_alignd512:
|
|
case X86::BI__builtin_ia32_alignq128:
|
|
case X86::BI__builtin_ia32_alignq256:
|
|
case X86::BI__builtin_ia32_alignq512:
|
|
case X86::BI__builtin_ia32_shuf_f32x4_256:
|
|
case X86::BI__builtin_ia32_shuf_f64x2_256:
|
|
case X86::BI__builtin_ia32_shuf_i32x4_256:
|
|
case X86::BI__builtin_ia32_shuf_i64x2_256:
|
|
case X86::BI__builtin_ia32_shuf_f32x4:
|
|
case X86::BI__builtin_ia32_shuf_f64x2:
|
|
case X86::BI__builtin_ia32_shuf_i32x4:
|
|
case X86::BI__builtin_ia32_shuf_i64x2:
|
|
case X86::BI__builtin_ia32_vperm2f128_pd256:
|
|
case X86::BI__builtin_ia32_vperm2f128_ps256:
|
|
case X86::BI__builtin_ia32_vperm2f128_si256:
|
|
case X86::BI__builtin_ia32_permti256:
|
|
case X86::BI__builtin_ia32_pslldqi128_byteshift:
|
|
case X86::BI__builtin_ia32_pslldqi256_byteshift:
|
|
case X86::BI__builtin_ia32_pslldqi512_byteshift:
|
|
case X86::BI__builtin_ia32_psrldqi128_byteshift:
|
|
case X86::BI__builtin_ia32_psrldqi256_byteshift:
|
|
case X86::BI__builtin_ia32_psrldqi512_byteshift:
|
|
cgm.errorNYI(expr->getSourceRange(),
|
|
std::string("unimplemented X86 builtin call: ") +
|
|
getContext().BuiltinInfo.getName(builtinID));
|
|
return {};
|
|
case X86::BI__builtin_ia32_kshiftliqi:
|
|
case X86::BI__builtin_ia32_kshiftlihi:
|
|
case X86::BI__builtin_ia32_kshiftlisi:
|
|
case X86::BI__builtin_ia32_kshiftlidi: {
|
|
unsigned shiftVal =
|
|
ops[1].getDefiningOp<cir::ConstantOp>().getIntValue().getZExtValue() &
|
|
0xff;
|
|
unsigned numElems = cast<cir::IntType>(ops[0].getType()).getWidth();
|
|
|
|
if (shiftVal >= numElems)
|
|
return builder.getNullValue(ops[0].getType(), getLoc(expr->getExprLoc()));
|
|
|
|
mlir::Value in = getMaskVecValue(*this, expr, ops[0], numElems);
|
|
|
|
SmallVector<mlir::Attribute, 64> indices;
|
|
mlir::Type i32Ty = builder.getSInt32Ty();
|
|
for (auto i : llvm::seq<unsigned>(0, numElems))
|
|
indices.push_back(cir::IntAttr::get(i32Ty, numElems + i - shiftVal));
|
|
|
|
mlir::Value zero =
|
|
builder.getNullValue(in.getType(), getLoc(expr->getExprLoc()));
|
|
mlir::Value sv =
|
|
builder.createVecShuffle(getLoc(expr->getExprLoc()), zero, in, indices);
|
|
return builder.createBitcast(sv, ops[0].getType());
|
|
}
|
|
case X86::BI__builtin_ia32_kshiftriqi:
|
|
case X86::BI__builtin_ia32_kshiftrihi:
|
|
case X86::BI__builtin_ia32_kshiftrisi:
|
|
case X86::BI__builtin_ia32_kshiftridi: {
|
|
unsigned shiftVal =
|
|
ops[1].getDefiningOp<cir::ConstantOp>().getIntValue().getZExtValue() &
|
|
0xff;
|
|
unsigned numElems = cast<cir::IntType>(ops[0].getType()).getWidth();
|
|
|
|
if (shiftVal >= numElems)
|
|
return builder.getNullValue(ops[0].getType(), getLoc(expr->getExprLoc()));
|
|
|
|
mlir::Value in = getMaskVecValue(*this, expr, ops[0], numElems);
|
|
|
|
SmallVector<mlir::Attribute, 64> indices;
|
|
mlir::Type i32Ty = builder.getSInt32Ty();
|
|
for (auto i : llvm::seq<unsigned>(0, numElems))
|
|
indices.push_back(cir::IntAttr::get(i32Ty, i + shiftVal));
|
|
|
|
mlir::Value zero =
|
|
builder.getNullValue(in.getType(), getLoc(expr->getExprLoc()));
|
|
mlir::Value sv =
|
|
builder.createVecShuffle(getLoc(expr->getExprLoc()), in, zero, indices);
|
|
return builder.createBitcast(sv, ops[0].getType());
|
|
}
|
|
case X86::BI__builtin_ia32_vprotbi:
|
|
case X86::BI__builtin_ia32_vprotwi:
|
|
case X86::BI__builtin_ia32_vprotdi:
|
|
case X86::BI__builtin_ia32_vprotqi:
|
|
case X86::BI__builtin_ia32_prold128:
|
|
case X86::BI__builtin_ia32_prold256:
|
|
case X86::BI__builtin_ia32_prold512:
|
|
case X86::BI__builtin_ia32_prolq128:
|
|
case X86::BI__builtin_ia32_prolq256:
|
|
case X86::BI__builtin_ia32_prolq512:
|
|
case X86::BI__builtin_ia32_prord128:
|
|
case X86::BI__builtin_ia32_prord256:
|
|
case X86::BI__builtin_ia32_prord512:
|
|
case X86::BI__builtin_ia32_prorq128:
|
|
case X86::BI__builtin_ia32_prorq256:
|
|
case X86::BI__builtin_ia32_prorq512:
|
|
case X86::BI__builtin_ia32_selectb_128:
|
|
case X86::BI__builtin_ia32_selectb_256:
|
|
case X86::BI__builtin_ia32_selectb_512:
|
|
case X86::BI__builtin_ia32_selectw_128:
|
|
case X86::BI__builtin_ia32_selectw_256:
|
|
case X86::BI__builtin_ia32_selectw_512:
|
|
case X86::BI__builtin_ia32_selectd_128:
|
|
case X86::BI__builtin_ia32_selectd_256:
|
|
case X86::BI__builtin_ia32_selectd_512:
|
|
case X86::BI__builtin_ia32_selectq_128:
|
|
case X86::BI__builtin_ia32_selectq_256:
|
|
case X86::BI__builtin_ia32_selectq_512:
|
|
case X86::BI__builtin_ia32_selectph_128:
|
|
case X86::BI__builtin_ia32_selectph_256:
|
|
case X86::BI__builtin_ia32_selectph_512:
|
|
case X86::BI__builtin_ia32_selectpbf_128:
|
|
case X86::BI__builtin_ia32_selectpbf_256:
|
|
case X86::BI__builtin_ia32_selectpbf_512:
|
|
case X86::BI__builtin_ia32_selectps_128:
|
|
case X86::BI__builtin_ia32_selectps_256:
|
|
case X86::BI__builtin_ia32_selectps_512:
|
|
case X86::BI__builtin_ia32_selectpd_128:
|
|
case X86::BI__builtin_ia32_selectpd_256:
|
|
case X86::BI__builtin_ia32_selectpd_512:
|
|
case X86::BI__builtin_ia32_selectsh_128:
|
|
case X86::BI__builtin_ia32_selectsbf_128:
|
|
case X86::BI__builtin_ia32_selectss_128:
|
|
case X86::BI__builtin_ia32_selectsd_128:
|
|
case X86::BI__builtin_ia32_cmpb128_mask:
|
|
case X86::BI__builtin_ia32_cmpb256_mask:
|
|
case X86::BI__builtin_ia32_cmpb512_mask:
|
|
case X86::BI__builtin_ia32_cmpw128_mask:
|
|
case X86::BI__builtin_ia32_cmpw256_mask:
|
|
case X86::BI__builtin_ia32_cmpw512_mask:
|
|
case X86::BI__builtin_ia32_cmpd128_mask:
|
|
case X86::BI__builtin_ia32_cmpd256_mask:
|
|
case X86::BI__builtin_ia32_cmpd512_mask:
|
|
case X86::BI__builtin_ia32_cmpq128_mask:
|
|
case X86::BI__builtin_ia32_cmpq256_mask:
|
|
case X86::BI__builtin_ia32_cmpq512_mask:
|
|
case X86::BI__builtin_ia32_ucmpb128_mask:
|
|
case X86::BI__builtin_ia32_ucmpb256_mask:
|
|
case X86::BI__builtin_ia32_ucmpb512_mask:
|
|
case X86::BI__builtin_ia32_ucmpw128_mask:
|
|
case X86::BI__builtin_ia32_ucmpw256_mask:
|
|
case X86::BI__builtin_ia32_ucmpw512_mask:
|
|
case X86::BI__builtin_ia32_ucmpd128_mask:
|
|
case X86::BI__builtin_ia32_ucmpd256_mask:
|
|
case X86::BI__builtin_ia32_ucmpd512_mask:
|
|
case X86::BI__builtin_ia32_ucmpq128_mask:
|
|
case X86::BI__builtin_ia32_ucmpq256_mask:
|
|
case X86::BI__builtin_ia32_ucmpq512_mask:
|
|
case X86::BI__builtin_ia32_vpcomb:
|
|
case X86::BI__builtin_ia32_vpcomw:
|
|
case X86::BI__builtin_ia32_vpcomd:
|
|
case X86::BI__builtin_ia32_vpcomq:
|
|
case X86::BI__builtin_ia32_vpcomub:
|
|
case X86::BI__builtin_ia32_vpcomuw:
|
|
case X86::BI__builtin_ia32_vpcomud:
|
|
case X86::BI__builtin_ia32_vpcomuq:
|
|
case X86::BI__builtin_ia32_kortestcqi:
|
|
case X86::BI__builtin_ia32_kortestchi:
|
|
case X86::BI__builtin_ia32_kortestcsi:
|
|
case X86::BI__builtin_ia32_kortestcdi:
|
|
case X86::BI__builtin_ia32_kortestzqi:
|
|
case X86::BI__builtin_ia32_kortestzhi:
|
|
case X86::BI__builtin_ia32_kortestzsi:
|
|
case X86::BI__builtin_ia32_kortestzdi:
|
|
case X86::BI__builtin_ia32_ktestcqi:
|
|
case X86::BI__builtin_ia32_ktestzqi:
|
|
case X86::BI__builtin_ia32_ktestchi:
|
|
case X86::BI__builtin_ia32_ktestzhi:
|
|
case X86::BI__builtin_ia32_ktestcsi:
|
|
case X86::BI__builtin_ia32_ktestzsi:
|
|
case X86::BI__builtin_ia32_ktestcdi:
|
|
case X86::BI__builtin_ia32_ktestzdi:
|
|
case X86::BI__builtin_ia32_kaddqi:
|
|
case X86::BI__builtin_ia32_kaddhi:
|
|
case X86::BI__builtin_ia32_kaddsi:
|
|
case X86::BI__builtin_ia32_kadddi:
|
|
case X86::BI__builtin_ia32_kandqi:
|
|
case X86::BI__builtin_ia32_kandhi:
|
|
case X86::BI__builtin_ia32_kandsi:
|
|
case X86::BI__builtin_ia32_kanddi:
|
|
case X86::BI__builtin_ia32_kandnqi:
|
|
case X86::BI__builtin_ia32_kandnhi:
|
|
case X86::BI__builtin_ia32_kandnsi:
|
|
case X86::BI__builtin_ia32_kandndi:
|
|
case X86::BI__builtin_ia32_korqi:
|
|
case X86::BI__builtin_ia32_korhi:
|
|
case X86::BI__builtin_ia32_korsi:
|
|
case X86::BI__builtin_ia32_kordi:
|
|
case X86::BI__builtin_ia32_kxnorqi:
|
|
case X86::BI__builtin_ia32_kxnorhi:
|
|
case X86::BI__builtin_ia32_kxnorsi:
|
|
case X86::BI__builtin_ia32_kxnordi:
|
|
case X86::BI__builtin_ia32_kxorqi:
|
|
case X86::BI__builtin_ia32_kxorhi:
|
|
case X86::BI__builtin_ia32_kxorsi:
|
|
case X86::BI__builtin_ia32_kxordi:
|
|
case X86::BI__builtin_ia32_knotqi:
|
|
case X86::BI__builtin_ia32_knothi:
|
|
case X86::BI__builtin_ia32_knotsi:
|
|
case X86::BI__builtin_ia32_knotdi:
|
|
case X86::BI__builtin_ia32_kmovb:
|
|
case X86::BI__builtin_ia32_kmovw:
|
|
case X86::BI__builtin_ia32_kmovd:
|
|
case X86::BI__builtin_ia32_kmovq:
|
|
case X86::BI__builtin_ia32_kunpckdi:
|
|
case X86::BI__builtin_ia32_kunpcksi:
|
|
case X86::BI__builtin_ia32_kunpckhi:
|
|
case X86::BI__builtin_ia32_sqrtsh_round_mask:
|
|
case X86::BI__builtin_ia32_sqrtsd_round_mask:
|
|
case X86::BI__builtin_ia32_sqrtss_round_mask:
|
|
case X86::BI__builtin_ia32_sqrtpd256:
|
|
case X86::BI__builtin_ia32_sqrtpd:
|
|
case X86::BI__builtin_ia32_sqrtps256:
|
|
case X86::BI__builtin_ia32_sqrtps:
|
|
case X86::BI__builtin_ia32_sqrtph256:
|
|
case X86::BI__builtin_ia32_sqrtph:
|
|
case X86::BI__builtin_ia32_sqrtph512:
|
|
case X86::BI__builtin_ia32_vsqrtbf16256:
|
|
case X86::BI__builtin_ia32_vsqrtbf16:
|
|
case X86::BI__builtin_ia32_vsqrtbf16512:
|
|
case X86::BI__builtin_ia32_sqrtps512:
|
|
case X86::BI__builtin_ia32_sqrtpd512:
|
|
case X86::BI__builtin_ia32_pmuludq128:
|
|
case X86::BI__builtin_ia32_pmuludq256:
|
|
case X86::BI__builtin_ia32_pmuludq512:
|
|
case X86::BI__builtin_ia32_pmuldq128:
|
|
case X86::BI__builtin_ia32_pmuldq256:
|
|
case X86::BI__builtin_ia32_pmuldq512:
|
|
case X86::BI__builtin_ia32_pternlogd512_mask:
|
|
case X86::BI__builtin_ia32_pternlogq512_mask:
|
|
case X86::BI__builtin_ia32_pternlogd128_mask:
|
|
case X86::BI__builtin_ia32_pternlogd256_mask:
|
|
case X86::BI__builtin_ia32_pternlogq128_mask:
|
|
case X86::BI__builtin_ia32_pternlogq256_mask:
|
|
case X86::BI__builtin_ia32_pternlogd512_maskz:
|
|
case X86::BI__builtin_ia32_pternlogq512_maskz:
|
|
case X86::BI__builtin_ia32_pternlogd128_maskz:
|
|
case X86::BI__builtin_ia32_pternlogd256_maskz:
|
|
case X86::BI__builtin_ia32_pternlogq128_maskz:
|
|
case X86::BI__builtin_ia32_pternlogq256_maskz:
|
|
case X86::BI__builtin_ia32_vpshldd128:
|
|
case X86::BI__builtin_ia32_vpshldd256:
|
|
case X86::BI__builtin_ia32_vpshldd512:
|
|
case X86::BI__builtin_ia32_vpshldq128:
|
|
case X86::BI__builtin_ia32_vpshldq256:
|
|
case X86::BI__builtin_ia32_vpshldq512:
|
|
case X86::BI__builtin_ia32_vpshldw128:
|
|
case X86::BI__builtin_ia32_vpshldw256:
|
|
case X86::BI__builtin_ia32_vpshldw512:
|
|
case X86::BI__builtin_ia32_vpshrdd128:
|
|
case X86::BI__builtin_ia32_vpshrdd256:
|
|
case X86::BI__builtin_ia32_vpshrdd512:
|
|
case X86::BI__builtin_ia32_vpshrdq128:
|
|
case X86::BI__builtin_ia32_vpshrdq256:
|
|
case X86::BI__builtin_ia32_vpshrdq512:
|
|
case X86::BI__builtin_ia32_vpshrdw128:
|
|
case X86::BI__builtin_ia32_vpshrdw256:
|
|
case X86::BI__builtin_ia32_vpshrdw512:
|
|
case X86::BI__builtin_ia32_reduce_fadd_pd512:
|
|
case X86::BI__builtin_ia32_reduce_fadd_ps512:
|
|
case X86::BI__builtin_ia32_reduce_fadd_ph512:
|
|
case X86::BI__builtin_ia32_reduce_fadd_ph256:
|
|
case X86::BI__builtin_ia32_reduce_fadd_ph128:
|
|
case X86::BI__builtin_ia32_reduce_fmul_pd512:
|
|
case X86::BI__builtin_ia32_reduce_fmul_ps512:
|
|
case X86::BI__builtin_ia32_reduce_fmul_ph512:
|
|
case X86::BI__builtin_ia32_reduce_fmul_ph256:
|
|
case X86::BI__builtin_ia32_reduce_fmul_ph128:
|
|
case X86::BI__builtin_ia32_reduce_fmax_pd512:
|
|
case X86::BI__builtin_ia32_reduce_fmax_ps512:
|
|
case X86::BI__builtin_ia32_reduce_fmax_ph512:
|
|
case X86::BI__builtin_ia32_reduce_fmax_ph256:
|
|
case X86::BI__builtin_ia32_reduce_fmax_ph128:
|
|
case X86::BI__builtin_ia32_reduce_fmin_pd512:
|
|
case X86::BI__builtin_ia32_reduce_fmin_ps512:
|
|
case X86::BI__builtin_ia32_reduce_fmin_ph512:
|
|
case X86::BI__builtin_ia32_reduce_fmin_ph256:
|
|
case X86::BI__builtin_ia32_reduce_fmin_ph128:
|
|
case X86::BI__builtin_ia32_rdrand16_step:
|
|
case X86::BI__builtin_ia32_rdrand32_step:
|
|
case X86::BI__builtin_ia32_rdrand64_step:
|
|
case X86::BI__builtin_ia32_rdseed16_step:
|
|
case X86::BI__builtin_ia32_rdseed32_step:
|
|
case X86::BI__builtin_ia32_rdseed64_step:
|
|
case X86::BI__builtin_ia32_addcarryx_u32:
|
|
case X86::BI__builtin_ia32_addcarryx_u64:
|
|
case X86::BI__builtin_ia32_subborrow_u32:
|
|
case X86::BI__builtin_ia32_subborrow_u64:
|
|
case X86::BI__builtin_ia32_fpclassps128_mask:
|
|
case X86::BI__builtin_ia32_fpclassps256_mask:
|
|
case X86::BI__builtin_ia32_fpclassps512_mask:
|
|
case X86::BI__builtin_ia32_vfpclassbf16128_mask:
|
|
case X86::BI__builtin_ia32_vfpclassbf16256_mask:
|
|
case X86::BI__builtin_ia32_vfpclassbf16512_mask:
|
|
case X86::BI__builtin_ia32_fpclassph128_mask:
|
|
case X86::BI__builtin_ia32_fpclassph256_mask:
|
|
case X86::BI__builtin_ia32_fpclassph512_mask:
|
|
case X86::BI__builtin_ia32_fpclasspd128_mask:
|
|
case X86::BI__builtin_ia32_fpclasspd256_mask:
|
|
case X86::BI__builtin_ia32_fpclasspd512_mask:
|
|
case X86::BI__builtin_ia32_vp2intersect_q_512:
|
|
case X86::BI__builtin_ia32_vp2intersect_q_256:
|
|
case X86::BI__builtin_ia32_vp2intersect_q_128:
|
|
case X86::BI__builtin_ia32_vp2intersect_d_512:
|
|
case X86::BI__builtin_ia32_vp2intersect_d_256:
|
|
case X86::BI__builtin_ia32_vp2intersect_d_128:
|
|
case X86::BI__builtin_ia32_vpmultishiftqb128:
|
|
case X86::BI__builtin_ia32_vpmultishiftqb256:
|
|
case X86::BI__builtin_ia32_vpmultishiftqb512:
|
|
case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
|
|
case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
|
|
case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
|
|
case X86::BI__builtin_ia32_cmpeqps:
|
|
case X86::BI__builtin_ia32_cmpeqpd:
|
|
case X86::BI__builtin_ia32_cmpltps:
|
|
case X86::BI__builtin_ia32_cmpltpd:
|
|
case X86::BI__builtin_ia32_cmpleps:
|
|
case X86::BI__builtin_ia32_cmplepd:
|
|
case X86::BI__builtin_ia32_cmpunordps:
|
|
case X86::BI__builtin_ia32_cmpunordpd:
|
|
case X86::BI__builtin_ia32_cmpneqps:
|
|
case X86::BI__builtin_ia32_cmpneqpd:
|
|
cgm.errorNYI(expr->getSourceRange(),
|
|
std::string("unimplemented X86 builtin call: ") +
|
|
getContext().BuiltinInfo.getName(builtinID));
|
|
return {};
|
|
case X86::BI__builtin_ia32_cmpnltps:
|
|
case X86::BI__builtin_ia32_cmpnltpd:
|
|
return emitVectorFCmp(builder, ops, getLoc(expr->getExprLoc()),
|
|
cir::CmpOpKind::lt, /*shouldInvert=*/true);
|
|
case X86::BI__builtin_ia32_cmpnleps:
|
|
case X86::BI__builtin_ia32_cmpnlepd:
|
|
return emitVectorFCmp(builder, ops, getLoc(expr->getExprLoc()),
|
|
cir::CmpOpKind::le, /*shouldInvert=*/true);
|
|
case X86::BI__builtin_ia32_cmpordps:
|
|
case X86::BI__builtin_ia32_cmpordpd:
|
|
case X86::BI__builtin_ia32_cmpph128_mask:
|
|
case X86::BI__builtin_ia32_cmpph256_mask:
|
|
case X86::BI__builtin_ia32_cmpph512_mask:
|
|
case X86::BI__builtin_ia32_cmpps128_mask:
|
|
case X86::BI__builtin_ia32_cmpps256_mask:
|
|
case X86::BI__builtin_ia32_cmpps512_mask:
|
|
case X86::BI__builtin_ia32_cmppd128_mask:
|
|
case X86::BI__builtin_ia32_cmppd256_mask:
|
|
case X86::BI__builtin_ia32_cmppd512_mask:
|
|
case X86::BI__builtin_ia32_vcmpbf16512_mask:
|
|
case X86::BI__builtin_ia32_vcmpbf16256_mask:
|
|
case X86::BI__builtin_ia32_vcmpbf16128_mask:
|
|
case X86::BI__builtin_ia32_cmpps:
|
|
case X86::BI__builtin_ia32_cmpps256:
|
|
case X86::BI__builtin_ia32_cmppd:
|
|
case X86::BI__builtin_ia32_cmppd256:
|
|
case X86::BI__builtin_ia32_cmpeqss:
|
|
case X86::BI__builtin_ia32_cmpltss:
|
|
case X86::BI__builtin_ia32_cmpless:
|
|
case X86::BI__builtin_ia32_cmpunordss:
|
|
case X86::BI__builtin_ia32_cmpneqss:
|
|
case X86::BI__builtin_ia32_cmpnltss:
|
|
case X86::BI__builtin_ia32_cmpnless:
|
|
case X86::BI__builtin_ia32_cmpordss:
|
|
case X86::BI__builtin_ia32_cmpeqsd:
|
|
case X86::BI__builtin_ia32_cmpltsd:
|
|
case X86::BI__builtin_ia32_cmplesd:
|
|
case X86::BI__builtin_ia32_cmpunordsd:
|
|
case X86::BI__builtin_ia32_cmpneqsd:
|
|
case X86::BI__builtin_ia32_cmpnltsd:
|
|
case X86::BI__builtin_ia32_cmpnlesd:
|
|
case X86::BI__builtin_ia32_cmpordsd:
|
|
case X86::BI__builtin_ia32_vcvtph2ps_mask:
|
|
case X86::BI__builtin_ia32_vcvtph2ps256_mask:
|
|
case X86::BI__builtin_ia32_vcvtph2ps512_mask:
|
|
case X86::BI__builtin_ia32_cvtneps2bf16_128_mask:
|
|
case X86::BI__builtin_ia32_cvtsbf162ss_32:
|
|
case X86::BI__builtin_ia32_cvtneps2bf16_256_mask:
|
|
case X86::BI__builtin_ia32_cvtneps2bf16_512_mask:
|
|
case X86::BI__cpuid:
|
|
case X86::BI__cpuidex:
|
|
case X86::BI__emul:
|
|
case X86::BI__emulu:
|
|
case X86::BI__mulh:
|
|
case X86::BI__umulh:
|
|
case X86::BI_mul128:
|
|
case X86::BI_umul128:
|
|
case X86::BI__faststorefence:
|
|
case X86::BI__shiftleft128:
|
|
case X86::BI__shiftright128:
|
|
case X86::BI_ReadWriteBarrier:
|
|
case X86::BI_ReadBarrier:
|
|
case X86::BI_WriteBarrier:
|
|
case X86::BI_AddressOfReturnAddress:
|
|
case X86::BI__stosb:
|
|
case X86::BI__ud2:
|
|
case X86::BI__int2c:
|
|
case X86::BI__readfsbyte:
|
|
case X86::BI__readfsword:
|
|
case X86::BI__readfsdword:
|
|
case X86::BI__readfsqword:
|
|
case X86::BI__readgsbyte:
|
|
case X86::BI__readgsword:
|
|
case X86::BI__readgsdword:
|
|
case X86::BI__readgsqword:
|
|
case X86::BI__builtin_ia32_encodekey128_u32:
|
|
case X86::BI__builtin_ia32_encodekey256_u32:
|
|
case X86::BI__builtin_ia32_aesenc128kl_u8:
|
|
case X86::BI__builtin_ia32_aesdec128kl_u8:
|
|
case X86::BI__builtin_ia32_aesenc256kl_u8:
|
|
case X86::BI__builtin_ia32_aesdec256kl_u8:
|
|
case X86::BI__builtin_ia32_aesencwide128kl_u8:
|
|
case X86::BI__builtin_ia32_aesdecwide128kl_u8:
|
|
case X86::BI__builtin_ia32_aesencwide256kl_u8:
|
|
case X86::BI__builtin_ia32_aesdecwide256kl_u8:
|
|
case X86::BI__builtin_ia32_vfcmaddcph512_mask:
|
|
case X86::BI__builtin_ia32_vfmaddcph512_mask:
|
|
case X86::BI__builtin_ia32_vfcmaddcsh_round_mask:
|
|
case X86::BI__builtin_ia32_vfmaddcsh_round_mask:
|
|
case X86::BI__builtin_ia32_vfcmaddcsh_round_mask3:
|
|
case X86::BI__builtin_ia32_vfmaddcsh_round_mask3:
|
|
case X86::BI__builtin_ia32_prefetchi:
|
|
cgm.errorNYI(expr->getSourceRange(),
|
|
std::string("unimplemented X86 builtin call: ") +
|
|
getContext().BuiltinInfo.getName(builtinID));
|
|
return {};
|
|
}
|
|
}
|