llvm-project/llvm/lib/Target/Foot/FootRegisterInfo.cpp
2026-03-31 13:37:16 -04:00

74 lines
2.1 KiB
C++

#include "FootRegisterInfo.h"
#include "FootFrameLowering.h"
#include "MCTargetDesc/FootMCTargetDesc.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#define GET_REGINFO_TARGET_DESC
#include "FootGenRegisterInfo.inc"
using namespace llvm;
FootRegisterInfo::FootRegisterInfo() : FootGenRegisterInfo(Foot::RRA) {}
const MCPhysReg *
FootRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
return CSR_Foot_Common_SaveList;
}
const uint32_t *
FootRegisterInfo::getCallPreservedMask(const MachineFunction &MF,
CallingConv::ID CC) const {
return CSR_Foot_Common_RegMask;
}
BitVector FootRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
BitVector Reserved;
Reserved.set(Foot::R26);
Reserved.set(Foot::R27);
Reserved.set(Foot::RSP);
Reserved.set(Foot::RRA);
Reserved.set(Foot::RLC);
Reserved.set(Foot::RPC);
return Reserved;
}
bool FootRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
int SPAdj, unsigned FIOperandNum,
RegScavenger *RS) const {
MachineInstr &MI = *II;
MachineBasicBlock &MBB = *MI.getParent();
MachineFunction &MF = *MBB.getParent();
const MachineFrameInfo &MFI = MF.getFrameInfo();
const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
DebugLoc DL = MI.getDebugLoc();
MachineOperand &FIOp = MI.getOperand(FIOperandNum);
int Index = FIOp.getIndex();
int64_t Offset = MFI.getObjectOffset(Index);
// adjust to account for stack pointer adjusted before load/store
Offset += MFI.getStackSize();
Register DestReg = Foot::R27;
if (FIOperandNum == 1) {
DestReg = Foot::R26;
}
BuildMI(MBB, MI, DebugLoc(), TII.get(Foot::ADDI_D_D_M_A), DestReg)
.addReg(Foot::RSP)
.addImm(Offset);
FIOp.ChangeToRegister(DestReg, false);
return false;
}
Register FootRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
return Foot::RSP;
}